177680cefSshatty /* 277680cefSshatty Copyright 1999, Be Incorporated. All Rights Reserved. 377680cefSshatty This file may be used under the terms of the Be Sample Code License. 477680cefSshatty 577680cefSshatty Other authors: 6*81d3e946Sshatty Rudolf Cornelissen 4/2003-8/2003 777680cefSshatty */ 877680cefSshatty 977680cefSshatty #define MODULE_BIT 0x02000000 1077680cefSshatty 1177680cefSshatty #include "acc_std.h" 1277680cefSshatty 1377680cefSshatty /* 1477680cefSshatty Return the current display mode. The only time you might return an 1577680cefSshatty error is if a mode hasn't been set. Or if the system hands you a NULL pointer. 1677680cefSshatty */ 1777680cefSshatty status_t GET_DISPLAY_MODE(display_mode *current_mode) 1877680cefSshatty { 1977680cefSshatty /* check for NULL pointer */ 2077680cefSshatty if (current_mode == NULL) return B_ERROR; 2177680cefSshatty 2277680cefSshatty *current_mode = si->dm; 2377680cefSshatty return B_OK; 2477680cefSshatty } 2577680cefSshatty 2677680cefSshatty /* Return the frame buffer configuration information. */ 2777680cefSshatty status_t GET_FRAME_BUFFER_CONFIG(frame_buffer_config *afb) 2877680cefSshatty { 2977680cefSshatty /* check for NULL pointer */ 3077680cefSshatty if (afb == NULL) return B_ERROR; 3177680cefSshatty 3277680cefSshatty *afb = si->fbc; 3377680cefSshatty return B_OK; 3477680cefSshatty } 3577680cefSshatty 3677680cefSshatty /* Return the maximum and minium pixelclock limits for the specified mode. */ 3777680cefSshatty status_t GET_PIXEL_CLOCK_LIMITS(display_mode *dm, uint32 *low, uint32 *high) 3877680cefSshatty { 3977680cefSshatty uint32 max_pclk = 0; 4077680cefSshatty uint32 min_pclk = 0; 4177680cefSshatty 4277680cefSshatty /* check for NULL pointers */ 4377680cefSshatty if ((dm == NULL) || (low == NULL) || (high == NULL)) return B_ERROR; 4477680cefSshatty 4577680cefSshatty /* specify requested info assuming CRT-only mode 4677680cefSshatty * (if panel is active, CRTC and pixelclock are not programmed!) */ 4777680cefSshatty { 4877680cefSshatty /* find min. value */ 4977680cefSshatty switch (si->ps.card_type) 5077680cefSshatty { 5177680cefSshatty default: 5277680cefSshatty *low = (si->ps.min_pixel_vco * 1000); 5377680cefSshatty break; 5477680cefSshatty } 5577680cefSshatty /* find max. value */ 5677680cefSshatty switch (dm->space) 5777680cefSshatty { 5877680cefSshatty case B_CMAP8: 5977680cefSshatty max_pclk = si->ps.max_dac1_clock_8; 6077680cefSshatty break; 6177680cefSshatty case B_RGB15_LITTLE: 6277680cefSshatty case B_RGB16_LITTLE: 6377680cefSshatty max_pclk = si->ps.max_dac1_clock_16; 6477680cefSshatty break; 6577680cefSshatty case B_RGB24_LITTLE: 6677680cefSshatty max_pclk = si->ps.max_dac1_clock_24; 6777680cefSshatty break; 6877680cefSshatty default: 6977680cefSshatty /* use fail-safe value */ 7077680cefSshatty max_pclk = si->ps.max_dac1_clock_24; 7177680cefSshatty break; 7277680cefSshatty } 7377680cefSshatty /* return values in kHz */ 7477680cefSshatty *high = max_pclk * 1000; 7577680cefSshatty } 7677680cefSshatty 7777680cefSshatty /* clamp lower limit to 48Hz vertical refresh for now. 7877680cefSshatty * Apparantly the BeOS screenprefs app does limit the upper refreshrate to 90Hz, 7977680cefSshatty * while it does not limit the lower refreshrate. */ 8077680cefSshatty min_pclk = ((uint32)dm->timing.h_total * (uint32)dm->timing.v_total * 48) / 1000; 8177680cefSshatty if (min_pclk > *low) *low = min_pclk; 8277680cefSshatty 8377680cefSshatty return B_OK; 8477680cefSshatty } 8577680cefSshatty 8677680cefSshatty /* Return the semaphore id that will be used to signal a vertical sync occured. */ 8777680cefSshatty sem_id ACCELERANT_RETRACE_SEMAPHORE(void) 8877680cefSshatty { 89*81d3e946Sshatty // return si->vblank; 90*81d3e946Sshatty //temp: 91*81d3e946Sshatty return B_ERROR; 9277680cefSshatty } 93