1e404297eSAxel Dörfler /* 2e404297eSAxel Dörfler * Copyright 2006, Haiku, Inc. All Rights Reserved. 3e404297eSAxel Dörfler * Distributed under the terms of the MIT License. 4e404297eSAxel Dörfler * 5e404297eSAxel Dörfler * Authors: 6e404297eSAxel Dörfler * Axel Dörfler, axeld@pinc-software.de 7e404297eSAxel Dörfler */ 8e404297eSAxel Dörfler 9e404297eSAxel Dörfler 10e404297eSAxel Dörfler #include "accelerant_protos.h" 117d5957dfSAxel Dörfler #include "accelerant.h" 12e404297eSAxel Dörfler 13e404297eSAxel Dörfler 14e404297eSAxel Dörfler extern "C" void * 15e404297eSAxel Dörfler get_accelerant_hook(uint32 feature, void *data) 16e404297eSAxel Dörfler { 17e404297eSAxel Dörfler switch (feature) { 18e404297eSAxel Dörfler /* general */ 19e404297eSAxel Dörfler case B_INIT_ACCELERANT: 20*6c05095cSIthamar R. Adema return (void*)intel_init_accelerant; 21e404297eSAxel Dörfler case B_UNINIT_ACCELERANT: 22*6c05095cSIthamar R. Adema return (void*)intel_uninit_accelerant; 23e404297eSAxel Dörfler case B_CLONE_ACCELERANT: 24*6c05095cSIthamar R. Adema return (void*)intel_clone_accelerant; 25e404297eSAxel Dörfler case B_ACCELERANT_CLONE_INFO_SIZE: 26*6c05095cSIthamar R. Adema return (void*)intel_accelerant_clone_info_size; 27e404297eSAxel Dörfler case B_GET_ACCELERANT_CLONE_INFO: 28*6c05095cSIthamar R. Adema return (void*)intel_get_accelerant_clone_info; 29e404297eSAxel Dörfler case B_GET_ACCELERANT_DEVICE_INFO: 30*6c05095cSIthamar R. Adema return (void*)intel_get_accelerant_device_info; 31e404297eSAxel Dörfler case B_ACCELERANT_RETRACE_SEMAPHORE: 32*6c05095cSIthamar R. Adema return (void*)intel_accelerant_retrace_semaphore; 33e404297eSAxel Dörfler 34e404297eSAxel Dörfler /* mode configuration */ 35e404297eSAxel Dörfler case B_ACCELERANT_MODE_COUNT: 36*6c05095cSIthamar R. Adema return (void*)intel_accelerant_mode_count; 37e404297eSAxel Dörfler case B_GET_MODE_LIST: 38*6c05095cSIthamar R. Adema return (void*)intel_get_mode_list; 39e404297eSAxel Dörfler case B_PROPOSE_DISPLAY_MODE: 40*6c05095cSIthamar R. Adema return (void*)intel_propose_display_mode; 41e404297eSAxel Dörfler case B_SET_DISPLAY_MODE: 42*6c05095cSIthamar R. Adema return (void*)intel_set_display_mode; 43e404297eSAxel Dörfler case B_GET_DISPLAY_MODE: 44*6c05095cSIthamar R. Adema return (void*)intel_get_display_mode; 45e404297eSAxel Dörfler case B_GET_FRAME_BUFFER_CONFIG: 46*6c05095cSIthamar R. Adema return (void*)intel_get_frame_buffer_config; 47e404297eSAxel Dörfler case B_GET_PIXEL_CLOCK_LIMITS: 48*6c05095cSIthamar R. Adema return (void*)intel_get_pixel_clock_limits; 49e404297eSAxel Dörfler case B_MOVE_DISPLAY: 50*6c05095cSIthamar R. Adema return (void*)intel_move_display; 51e404297eSAxel Dörfler case B_SET_INDEXED_COLORS: 52*6c05095cSIthamar R. Adema return (void*)intel_set_indexed_colors; 53e404297eSAxel Dörfler case B_GET_TIMING_CONSTRAINTS: 54*6c05095cSIthamar R. Adema return (void*)intel_get_timing_constraints; 55e404297eSAxel Dörfler 56e404297eSAxel Dörfler /* DPMS */ 57e404297eSAxel Dörfler case B_DPMS_CAPABILITIES: 58*6c05095cSIthamar R. Adema return (void*)intel_dpms_capabilities; 59e404297eSAxel Dörfler case B_DPMS_MODE: 60*6c05095cSIthamar R. Adema return (void*)intel_dpms_mode; 61e404297eSAxel Dörfler case B_SET_DPMS_MODE: 62*6c05095cSIthamar R. Adema return (void*)intel_set_dpms_mode; 63e404297eSAxel Dörfler 64e404297eSAxel Dörfler /* cursor managment */ 657d5957dfSAxel Dörfler case B_SET_CURSOR_SHAPE: 667d5957dfSAxel Dörfler if (gInfo->cursor_memory != NULL) 67*6c05095cSIthamar R. Adema return (void*)intel_set_cursor_shape; 68e404297eSAxel Dörfler case B_MOVE_CURSOR: 697d5957dfSAxel Dörfler if (gInfo->cursor_memory != NULL) 70*6c05095cSIthamar R. Adema return (void*)intel_move_cursor; 71e404297eSAxel Dörfler case B_SHOW_CURSOR: 727d5957dfSAxel Dörfler if (gInfo->cursor_memory != NULL) 73*6c05095cSIthamar R. Adema return (void*)intel_show_cursor; 747d5957dfSAxel Dörfler 757d5957dfSAxel Dörfler return NULL; 767d5957dfSAxel Dörfler 77e404297eSAxel Dörfler /* engine/synchronization */ 78e404297eSAxel Dörfler case B_ACCELERANT_ENGINE_COUNT: 79*6c05095cSIthamar R. Adema return (void*)intel_accelerant_engine_count; 80e404297eSAxel Dörfler case B_ACQUIRE_ENGINE: 81*6c05095cSIthamar R. Adema return (void*)intel_acquire_engine; 82e404297eSAxel Dörfler case B_RELEASE_ENGINE: 83*6c05095cSIthamar R. Adema return (void*)intel_release_engine; 84e404297eSAxel Dörfler case B_WAIT_ENGINE_IDLE: 85*6c05095cSIthamar R. Adema return (void*)intel_wait_engine_idle; 86e404297eSAxel Dörfler case B_GET_SYNC_TOKEN: 87*6c05095cSIthamar R. Adema return (void*)intel_get_sync_token; 88e404297eSAxel Dörfler case B_SYNC_TO_TOKEN: 89*6c05095cSIthamar R. Adema return (void*)intel_sync_to_token; 90e404297eSAxel Dörfler 91e404297eSAxel Dörfler /* 2D acceleration */ 922ace35edSAxel Dörfler case B_SCREEN_TO_SCREEN_BLIT: 93*6c05095cSIthamar R. Adema return (void*)intel_screen_to_screen_blit; 942ace35edSAxel Dörfler case B_FILL_RECTANGLE: 95*6c05095cSIthamar R. Adema return (void*)intel_fill_rectangle; 962ace35edSAxel Dörfler case B_INVERT_RECTANGLE: 97*6c05095cSIthamar R. Adema return (void*)intel_invert_rectangle; 982ace35edSAxel Dörfler case B_FILL_SPAN: 99*6c05095cSIthamar R. Adema return (void*)intel_fill_span; 100d906e6a0SAxel Dörfler 101e404297eSAxel Dörfler // overlay 102eea30ef3SAxel Dörfler case B_OVERLAY_COUNT: 103*6c05095cSIthamar R. Adema return (void*)intel_overlay_supported_spaces; 104eea30ef3SAxel Dörfler case B_OVERLAY_SUPPORTED_SPACES: 105*6c05095cSIthamar R. Adema return (void*)intel_overlay_supported_spaces; 106eea30ef3SAxel Dörfler case B_OVERLAY_SUPPORTED_FEATURES: 107*6c05095cSIthamar R. Adema return (void*)intel_overlay_supported_features; 108eea30ef3SAxel Dörfler case B_ALLOCATE_OVERLAY_BUFFER: 109*6c05095cSIthamar R. Adema return (void*)intel_allocate_overlay_buffer; 110eea30ef3SAxel Dörfler case B_RELEASE_OVERLAY_BUFFER: 111*6c05095cSIthamar R. Adema return (void*)intel_release_overlay_buffer; 112eea30ef3SAxel Dörfler case B_GET_OVERLAY_CONSTRAINTS: 113*6c05095cSIthamar R. Adema return (void*)intel_get_overlay_constraints; 114eea30ef3SAxel Dörfler case B_ALLOCATE_OVERLAY: 115*6c05095cSIthamar R. Adema return (void*)intel_allocate_overlay; 116eea30ef3SAxel Dörfler case B_RELEASE_OVERLAY: 117*6c05095cSIthamar R. Adema return (void*)intel_release_overlay; 118eea30ef3SAxel Dörfler case B_CONFIGURE_OVERLAY: 119*6c05095cSIthamar R. Adema return (void*)intel_configure_overlay; 120e404297eSAxel Dörfler } 121e404297eSAxel Dörfler 122e404297eSAxel Dörfler return NULL; 123e404297eSAxel Dörfler } 124e404297eSAxel Dörfler 125