xref: /haiku/src/add-ons/accelerants/intel_extreme/accelerant.h (revision 079eccf655ba39812b421ae1b87a727d41b50354)
1 /*
2  * Copyright 2006-2008, Haiku, Inc. All Rights Reserved.
3  * Distributed under the terms of the MIT License.
4  *
5  * Authors:
6  *		Axel Dörfler, axeld@pinc-software.de
7  */
8 #ifndef INTEL_EXTREME_ACCELERANT_H
9 #define INTEL_EXTREME_ACCELERANT_H
10 
11 
12 #include "intel_extreme.h"
13 
14 #include <edid.h>
15 #include <video_overlay.h>
16 
17 
18 struct overlay {
19 	overlay_buffer	buffer;
20 	addr_t			buffer_base;
21 	uint32			buffer_offset;
22 	addr_t			state_base;
23 	uint32			state_offset;
24 };
25 
26 struct overlay_frame {
27 	int16			h_start;
28 	int16			v_start;
29 	uint16			width;
30 	uint16			height;
31 };
32 
33 struct accelerant_info {
34 	vuint8			*regs;
35 	area_id			regs_area;
36 
37 	intel_shared_info *shared_info;
38 	area_id			shared_info_area;
39 
40 	display_mode	*mode_list;		// cloned list of standard display modes
41 	area_id			mode_list_area;
42 
43 	struct overlay_registers *overlay_registers;
44 	overlay			*current_overlay;
45 	overlay_view	last_overlay_view;
46 	overlay_frame	last_overlay_frame;
47 	uint32			last_horizontal_overlay_scale;
48 	uint32			last_vertical_overlay_scale;
49 	uint32			overlay_position_buffer_offset;
50 
51 	edid1_info		edid_info;
52 	bool			has_edid;
53 
54 	// limited 3D support for overlay on i965
55 	addr_t			context_base;
56 	uint32			context_offset;
57 	bool			context_set;
58 
59 	int				device;
60 	uint8			head_mode;
61 	bool			is_clone;
62 
63 	// LVDS panel mode passed from the bios/startup.
64 	display_mode	lvds_panel_mode;
65 };
66 
67 #define HEAD_MODE_A_ANALOG		0x01
68 #define HEAD_MODE_B_DIGITAL		0x02
69 #define HEAD_MODE_CLONE			0x03
70 #define HEAD_MODE_LVDS_PANEL	0x08
71 
72 extern accelerant_info *gInfo;
73 
74 // register access
75 
76 inline uint32
77 read32(uint32 offset)
78 {
79 	return *(volatile uint32 *)(gInfo->regs + offset);
80 }
81 
82 inline void
83 write32(uint32 offset, uint32 value)
84 {
85 	*(volatile uint32 *)(gInfo->regs + offset) = value;
86 }
87 
88 
89 // dpms.cpp
90 extern void enable_display_plane(bool enable);
91 extern void set_display_power_mode(uint32 mode);
92 
93 // engine.cpp
94 extern void uninit_ring_buffer(ring_buffer &ringBuffer);
95 extern void setup_ring_buffer(ring_buffer &ringBuffer, const char *name);
96 
97 // modes.cpp
98 extern void wait_for_vblank(void);
99 extern void set_frame_buffer_base(void);
100 extern void save_lvds_mode(void);
101 extern status_t create_mode_list(void);
102 
103 // memory.cpp
104 extern void intel_free_memory(uint32 base);
105 extern status_t intel_allocate_memory(size_t size, uint32 flags, uint32 &base);
106 
107 #endif	/* INTEL_EXTREME_ACCELERANT_H */
108