1 /* 2 * Copyright 2006-2008, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 */ 8 #ifndef INTEL_EXTREME_ACCELERANT_H 9 #define INTEL_EXTREME_ACCELERANT_H 10 11 12 #include "intel_extreme.h" 13 14 #include <edid.h> 15 #include <video_overlay.h> 16 17 #include "Ports.h" 18 #include "Pipes.h" 19 20 21 struct overlay { 22 overlay_buffer buffer; 23 addr_t buffer_base; 24 uint32 buffer_offset; 25 addr_t state_base; 26 uint32 state_offset; 27 }; 28 29 struct overlay_frame { 30 int16 h_start; 31 int16 v_start; 32 uint16 width; 33 uint16 height; 34 }; 35 36 struct accelerant_info { 37 uint8* registers; 38 area_id regs_area; 39 40 intel_shared_info* shared_info; 41 area_id shared_info_area; 42 43 display_mode* mode_list; // cloned list of standard display modes 44 area_id mode_list_area; 45 46 struct overlay_registers* overlay_registers; 47 overlay* current_overlay; 48 overlay_view last_overlay_view; 49 overlay_frame last_overlay_frame; 50 uint32 last_horizontal_overlay_scale; 51 uint32 last_vertical_overlay_scale; 52 uint32 overlay_position_buffer_offset; 53 54 uint32 port_count; 55 Port* ports[MAX_PORTS]; 56 57 uint32 pipe_count; 58 Pipe* pipes[MAX_PIPES]; 59 60 edid1_info edid_info; 61 bool has_edid; 62 63 // limited 3D support for overlay on i965 64 addr_t context_base; 65 uint32 context_offset; 66 bool context_set; 67 68 int device; 69 uint8 head_mode; 70 bool is_clone; 71 }; 72 73 74 #define HEAD_MODE_A_ANALOG 0x0001 75 #define HEAD_MODE_B_DIGITAL 0x0002 76 #define HEAD_MODE_LVDS_PANEL 0x0008 77 78 extern accelerant_info* gInfo; 79 80 // register access 81 82 inline uint32 83 read32(uint32 encodedRegister) 84 { 85 return *(volatile uint32*)(gInfo->registers 86 + gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)] 87 + REGISTER_REGISTER(encodedRegister)); 88 } 89 90 inline void 91 write32(uint32 encodedRegister, uint32 value) 92 { 93 *(volatile uint32*)(gInfo->registers 94 + gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)] 95 + REGISTER_REGISTER(encodedRegister)) = value; 96 } 97 98 void dump_registers(void); 99 100 // dpms.cpp 101 extern void enable_display_plane(bool enable); 102 extern void set_display_power_mode(uint32 mode); 103 104 // engine.cpp 105 extern void uninit_ring_buffer(ring_buffer &ringBuffer); 106 extern void setup_ring_buffer(ring_buffer &ringBuffer, const char* name); 107 108 // modes.cpp 109 extern void wait_for_vblank(void); 110 extern void set_frame_buffer_base(void); 111 extern status_t create_mode_list(void); 112 113 // memory.cpp 114 extern void intel_free_memory(addr_t base); 115 extern status_t intel_allocate_memory(size_t size, uint32 flags, addr_t &base); 116 117 #endif /* INTEL_EXTREME_ACCELERANT_H */ 118