1 /* 2 * Copyright 2006-2010, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 */ 8 9 10 #include "accelerant_protos.h" 11 #include "accelerant.h" 12 13 #include "utility.h" 14 15 #include <Debug.h> 16 #include <errno.h> 17 #include <stdlib.h> 18 #include <string.h> 19 #include <unistd.h> 20 #include <syslog.h> 21 22 #include <new> 23 24 #include <AGP.h> 25 26 27 #undef TRACE 28 #define TRACE_ACCELERANT 29 #ifdef TRACE_ACCELERANT 30 # define TRACE(x...) _sPrintf("intel_extreme: " x) 31 #else 32 # define TRACE(x...) 33 #endif 34 35 #define ERROR(x...) _sPrintf("intel_extreme: " x) 36 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__) 37 38 39 struct accelerant_info* gInfo; 40 uint32 gDumpCount; 41 42 43 class AreaCloner { 44 public: 45 AreaCloner(); 46 ~AreaCloner(); 47 48 area_id Clone(const char* name, void** _address, 49 uint32 spec, uint32 protection, 50 area_id sourceArea); 51 status_t InitCheck() 52 { return fArea < 0 ? (status_t)fArea : B_OK; } 53 void Keep(); 54 55 private: 56 area_id fArea; 57 }; 58 59 60 AreaCloner::AreaCloner() 61 : 62 fArea(-1) 63 { 64 } 65 66 67 AreaCloner::~AreaCloner() 68 { 69 if (fArea >= 0) 70 delete_area(fArea); 71 } 72 73 74 area_id 75 AreaCloner::Clone(const char* name, void** _address, uint32 spec, 76 uint32 protection, area_id sourceArea) 77 { 78 fArea = clone_area(name, _address, spec, protection, sourceArea); 79 return fArea; 80 } 81 82 83 void 84 AreaCloner::Keep() 85 { 86 fArea = -1; 87 } 88 89 90 // #pragma mark - 91 92 93 // intel_reg --mmio=ie-0001.bin --devid=27a2 dump 94 void 95 dump_registers() 96 { 97 char filename[255]; 98 99 sprintf(filename, "/boot/system/cache/tmp/ie-%04" B_PRId32 ".bin", 100 gDumpCount); 101 102 ERROR("%s: Taking register dump #%" B_PRId32 "\n", __func__, gDumpCount); 103 104 int fd = open(filename, O_CREAT | O_WRONLY, 0644); 105 uint32 data = 0; 106 if (fd >= 0) { 107 for (int32 i = 0; i < 0x80000; i += sizeof(data)) { 108 //char line[512]; 109 //int length = sprintf(line, "%05" B_PRIx32 ": " 110 // "%08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 "\n", 111 // i, read32(i), read32(i + 4), read32(i + 8), read32(i + 12)); 112 data = read32(i); 113 write(fd, &data, sizeof(data)); 114 } 115 close(fd); 116 sync(); 117 } 118 119 gDumpCount++; 120 } 121 122 123 /*! This is the common accelerant_info initializer. It is called by 124 both, the first accelerant and all clones. 125 */ 126 static status_t 127 init_common(int device, bool isClone) 128 { 129 // initialize global accelerant info structure 130 131 // Number of register dumps we have... taken. 132 gDumpCount = 0; 133 134 gInfo = (accelerant_info*)malloc(sizeof(accelerant_info)); 135 if (gInfo == NULL) 136 return B_NO_MEMORY; 137 138 memset(gInfo, 0, sizeof(accelerant_info)); 139 140 gInfo->is_clone = isClone; 141 gInfo->device = device; 142 143 // get basic info from driver 144 145 intel_get_private_data data; 146 data.magic = INTEL_PRIVATE_DATA_MAGIC; 147 148 if (ioctl(device, INTEL_GET_PRIVATE_DATA, &data, 149 sizeof(intel_get_private_data)) != 0) { 150 free(gInfo); 151 return B_ERROR; 152 } 153 154 AreaCloner sharedCloner; 155 gInfo->shared_info_area = sharedCloner.Clone("intel extreme shared info", 156 (void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 157 data.shared_info_area); 158 status_t status = sharedCloner.InitCheck(); 159 if (status < B_OK) { 160 free(gInfo); 161 return status; 162 } 163 164 AreaCloner regsCloner; 165 gInfo->regs_area = regsCloner.Clone("intel extreme regs", 166 (void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 167 gInfo->shared_info->registers_area); 168 status = regsCloner.InitCheck(); 169 if (status < B_OK) { 170 free(gInfo); 171 return status; 172 } 173 174 sharedCloner.Keep(); 175 regsCloner.Keep(); 176 177 // The overlay registers, hardware status, and cursor memory share 178 // a single area with the shared_info 179 180 if (gInfo->shared_info->overlay_offset != 0) { 181 gInfo->overlay_registers = (struct overlay_registers*) 182 (gInfo->shared_info->graphics_memory 183 + gInfo->shared_info->overlay_offset); 184 } 185 186 if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x)) { 187 // allocate some extra memory for the 3D context 188 if (intel_allocate_memory(INTEL_i965_3D_CONTEXT_SIZE, 189 B_APERTURE_NON_RESERVED, gInfo->context_base) == B_OK) { 190 gInfo->context_offset = gInfo->context_base 191 - (addr_t)gInfo->shared_info->graphics_memory; 192 } 193 } 194 195 gInfo->pipe_count = 0; 196 197 // Allocate all of our pipes 198 for (int i = 0; i < MAX_PIPES; i++) { 199 switch (i) { 200 case 0: 201 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_A); 202 break; 203 case 1: 204 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_B); 205 break; 206 default: 207 ERROR("%s: Unknown pipe %d\n", __func__, i); 208 } 209 if (gInfo->pipes[i] == NULL) 210 ERROR("%s: Error allocating pipe %d\n", __func__, i); 211 else 212 gInfo->pipe_count++; 213 } 214 215 return B_OK; 216 } 217 218 219 /*! Clean up data common to both primary and cloned accelerant */ 220 static void 221 uninit_common(void) 222 { 223 intel_free_memory(gInfo->context_base); 224 225 delete_area(gInfo->regs_area); 226 delete_area(gInfo->shared_info_area); 227 228 gInfo->regs_area = gInfo->shared_info_area = -1; 229 230 // close the file handle ONLY if we're the clone 231 if (gInfo->is_clone) 232 close(gInfo->device); 233 234 free(gInfo); 235 } 236 237 238 static void 239 dump_ports() 240 { 241 if (gInfo->port_count == 0) { 242 TRACE("%s: No ports connected\n", __func__); 243 return; 244 } 245 246 TRACE("%s: Connected ports: (port_count: %" B_PRIu32 ")\n", __func__, 247 gInfo->port_count); 248 249 for (uint32 i = 0; i < gInfo->port_count; i++) { 250 Port* port = gInfo->ports[i]; 251 if (!port) { 252 TRACE("port %" B_PRIu32 ":: INVALID ALLOC!\n", i); 253 continue; 254 } 255 TRACE("port %" B_PRIu32 ": %s %s\n", i, port->PortName(), 256 port->IsConnected() ? "connected" : "disconnected"); 257 } 258 } 259 260 261 static bool 262 has_connected_port(port_index portIndex, uint32 type) 263 { 264 for (uint32 i = 0; i < gInfo->port_count; i++) { 265 Port* port = gInfo->ports[i]; 266 if (type != INTEL_PORT_TYPE_ANY && port->Type() != type) 267 continue; 268 if (portIndex != INTEL_PORT_ANY && port->PortIndex() != portIndex) 269 continue; 270 271 return true; 272 } 273 274 return false; 275 } 276 277 278 static status_t 279 probe_ports() 280 { 281 // Try to determine what ports to use. We use the following heuristic: 282 // * Check for DisplayPort, these can be more or less detected reliably. 283 // * Check for HDMI, it'll fail on devices not having HDMI for us to fall 284 // back to DVI. 285 // * Assume DVI B if no HDMI and no DisplayPort is present, confirmed by 286 // reading EDID in the IsConnected() call. 287 // * Check for analog if possible (there's a detection bit on PCH), 288 // otherwise the assumed presence is confirmed by reading EDID in 289 // IsConnected(). 290 291 TRACE("adpa: %08" B_PRIx32 "\n", read32(INTEL_ANALOG_PORT)); 292 TRACE("dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32 293 ", dovc: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_PORT_A), 294 read32(INTEL_DIGITAL_PORT_B), read32(INTEL_DIGITAL_PORT_C)); 295 TRACE("lvds: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_LVDS_PORT)); 296 297 gInfo->port_count = 0; 298 for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) { 299 Port* displayPort = new(std::nothrow) DisplayPort((port_index)i); 300 if (displayPort == NULL) 301 return B_NO_MEMORY; 302 303 if (displayPort->IsConnected()) 304 gInfo->ports[gInfo->port_count++] = displayPort; 305 else 306 delete displayPort; 307 } 308 309 // Digital Display Interface 310 if (gInfo->shared_info->device_type.HasDDI()) { 311 for (int i = INTEL_PORT_A; i <= INTEL_PORT_E; i++) { 312 Port* ddiPort 313 = new(std::nothrow) DigitalDisplayInterface((port_index)i); 314 315 if (ddiPort == NULL) 316 return B_NO_MEMORY; 317 318 if (ddiPort->IsConnected()) 319 gInfo->ports[gInfo->port_count++] = ddiPort; 320 else 321 delete ddiPort; 322 } 323 } 324 325 // Ensure DP_A isn't already taken (or DDI) 326 if (!has_connected_port((port_index)INTEL_PORT_A, INTEL_PORT_TYPE_ANY)) { 327 // also always try eDP, it'll also just fail if not applicable 328 Port* eDPPort = new(std::nothrow) EmbeddedDisplayPort(); 329 if (eDPPort == NULL) 330 return B_NO_MEMORY; 331 if (eDPPort->IsConnected()) 332 gInfo->ports[gInfo->port_count++] = eDPPort; 333 else 334 delete eDPPort; 335 } 336 337 for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) { 338 if (has_connected_port((port_index)i, INTEL_PORT_TYPE_ANY)) { 339 // Ensure port not already claimed by something like DDI 340 continue; 341 } 342 343 Port* hdmiPort = new(std::nothrow) HDMIPort((port_index)i); 344 if (hdmiPort == NULL) 345 return B_NO_MEMORY; 346 347 if (hdmiPort->IsConnected()) 348 gInfo->ports[gInfo->port_count++] = hdmiPort; 349 else 350 delete hdmiPort; 351 } 352 353 if (!has_connected_port(INTEL_PORT_ANY, INTEL_PORT_TYPE_ANY)) { 354 // there's neither DisplayPort nor HDMI so far, assume DVI B 355 Port* dviPort = new(std::nothrow) DigitalPort(INTEL_PORT_B); 356 if (dviPort == NULL) 357 return B_NO_MEMORY; 358 359 if (dviPort->IsConnected()) { 360 gInfo->ports[gInfo->port_count++] = dviPort; 361 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 362 } else 363 delete dviPort; 364 } 365 366 // always try the LVDS port, it'll simply fail if not applicable 367 Port* lvdsPort = new(std::nothrow) LVDSPort(); 368 if (lvdsPort == NULL) 369 return B_NO_MEMORY; 370 if (lvdsPort->IsConnected()) { 371 gInfo->ports[gInfo->port_count++] = lvdsPort; 372 gInfo->head_mode |= HEAD_MODE_LVDS_PANEL; 373 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 374 } else 375 delete lvdsPort; 376 377 // then finally always try the analog port 378 Port* analogPort = new(std::nothrow) AnalogPort(); 379 if (analogPort == NULL) 380 return B_NO_MEMORY; 381 if (analogPort->IsConnected()) { 382 gInfo->ports[gInfo->port_count++] = analogPort; 383 gInfo->head_mode |= HEAD_MODE_A_ANALOG; 384 } else 385 delete analogPort; 386 387 if (gInfo->port_count == 0) 388 return B_ERROR; 389 390 return B_OK; 391 } 392 393 394 static status_t 395 assign_pipes() 396 { 397 // TODO: At some point we should "group" ports to pipes with the same mode. 398 // You can drive multiple ports from a single pipe as long as the mode is 399 // the same. For the moment we could get displays with the wrong pipes 400 // assigned when the count is > 1; 401 402 uint32 current = 0; 403 for (uint32 i = 0; i < gInfo->port_count; i++) { 404 if (gInfo->ports[i] == NULL) 405 continue; 406 407 pipe_index preference = gInfo->ports[i]->PipePreference(); 408 if (preference != INTEL_PIPE_ANY) { 409 // Some ports *really* need to be assigned a pipe due to 410 // implementation bugs. 411 int index = (preference == INTEL_PIPE_B) ? 1 : 0; 412 gInfo->ports[i]->SetPipe(gInfo->pipes[index]); 413 continue; 414 } 415 416 if (gInfo->ports[i]->IsConnected()) { 417 if (current >= gInfo->pipe_count) { 418 ERROR("%s: No pipes left to assign to port %s!\n", __func__, 419 gInfo->ports[i]->PortName()); 420 continue; 421 } 422 423 gInfo->ports[i]->SetPipe(gInfo->pipes[current]); 424 current++; 425 } 426 } 427 428 return B_OK; 429 } 430 431 432 // #pragma mark - public accelerant functions 433 434 435 /*! Init primary accelerant */ 436 status_t 437 intel_init_accelerant(int device) 438 { 439 CALLED(); 440 441 status_t status = init_common(device, false); 442 if (status != B_OK) 443 return status; 444 445 intel_shared_info &info = *gInfo->shared_info; 446 447 init_lock(&info.accelerant_lock, "intel extreme accelerant"); 448 init_lock(&info.engine_lock, "intel extreme engine"); 449 450 setup_ring_buffer(info.primary_ring_buffer, "intel primary ring buffer"); 451 452 TRACE("pipe control for: 0x%" B_PRIx32 " 0x%" B_PRIx32 "\n", 453 read32(INTEL_PIPE_CONTROL), read32(INTEL_PIPE_CONTROL)); 454 455 // Probe all ports 456 status = probe_ports(); 457 458 // On TRACE, dump ports and states 459 dump_ports(); 460 461 if (status != B_OK) 462 ERROR("Warning: zero active displays were found!\n"); 463 464 status = assign_pipes(); 465 466 if (status != B_OK) 467 ERROR("Warning: error while assigning pipes!\n"); 468 469 status = create_mode_list(); 470 if (status != B_OK) { 471 uninit_common(); 472 return status; 473 } 474 475 return B_OK; 476 } 477 478 479 ssize_t 480 intel_accelerant_clone_info_size(void) 481 { 482 CALLED(); 483 // clone info is device name, so return its maximum size 484 return B_PATH_NAME_LENGTH; 485 } 486 487 488 void 489 intel_get_accelerant_clone_info(void* info) 490 { 491 CALLED(); 492 ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH); 493 } 494 495 496 status_t 497 intel_clone_accelerant(void* info) 498 { 499 CALLED(); 500 501 // create full device name 502 char path[B_PATH_NAME_LENGTH]; 503 strcpy(path, "/dev/"); 504 #ifdef __HAIKU__ 505 strlcat(path, (const char*)info, sizeof(path)); 506 #else 507 strcat(path, (const char*)info); 508 #endif 509 510 int fd = open(path, B_READ_WRITE); 511 if (fd < 0) 512 return errno; 513 514 status_t status = init_common(fd, true); 515 if (status != B_OK) 516 goto err1; 517 518 // get read-only clone of supported display modes 519 status = gInfo->mode_list_area = clone_area( 520 "intel extreme cloned modes", (void**)&gInfo->mode_list, 521 B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area); 522 if (status < B_OK) 523 goto err2; 524 525 return B_OK; 526 527 err2: 528 uninit_common(); 529 err1: 530 close(fd); 531 return status; 532 } 533 534 535 /*! This function is called for both, the primary accelerant and all of 536 its clones. 537 */ 538 void 539 intel_uninit_accelerant(void) 540 { 541 CALLED(); 542 543 // delete accelerant instance data 544 delete_area(gInfo->mode_list_area); 545 gInfo->mode_list = NULL; 546 547 intel_shared_info &info = *gInfo->shared_info; 548 549 uninit_lock(&info.accelerant_lock); 550 uninit_lock(&info.engine_lock); 551 552 uninit_ring_buffer(info.primary_ring_buffer); 553 554 uninit_common(); 555 } 556 557 558 status_t 559 intel_get_accelerant_device_info(accelerant_device_info* info) 560 { 561 CALLED(); 562 563 info->version = B_ACCELERANT_VERSION; 564 565 DeviceType* type = &gInfo->shared_info->device_type; 566 567 if (type->InFamily(INTEL_FAMILY_7xx) || type->InFamily(INTEL_FAMILY_8xx)) 568 strcpy(info->name, "Intel Extreme"); 569 else if (type->InFamily(INTEL_FAMILY_9xx)) 570 strcpy(info->name, "Intel GMA"); 571 else if (type->InFamily(INTEL_FAMILY_POVR)) 572 strcpy(info->name, "Intel PowerVR"); 573 else if (type->InFamily(INTEL_FAMILY_SOC0)) 574 strcpy(info->name, "Intel Atom"); 575 else if (type->InFamily(INTEL_FAMILY_SER5)) 576 strcpy(info->name, "Intel HD/Iris"); 577 else 578 strcpy(info->name, "Intel"); 579 580 strcpy(info->chipset, gInfo->shared_info->device_identifier); 581 strcpy(info->serial_no, "None"); 582 583 info->memory = gInfo->shared_info->graphics_memory_size; 584 info->dac_speed = gInfo->shared_info->pll_info.max_frequency; 585 586 return B_OK; 587 } 588 589 590 sem_id 591 intel_accelerant_retrace_semaphore() 592 { 593 CALLED(); 594 return gInfo->shared_info->vblank_sem; 595 } 596