xref: /haiku/src/add-ons/accelerants/intel_extreme/accelerant.cpp (revision efafab643ce980e3f3c916795ed302599f6b4f66) 
1 /*
2  * Copyright 2006-2016, Haiku, Inc. All Rights Reserved.
3  * Distributed under the terms of the MIT License.
4  *
5  * Authors:
6  *		Axel Dörfler, axeld@pinc-software.de
7  */
8 
9 
10 #include "accelerant_protos.h"
11 #include "accelerant.h"
12 
13 #include "utility.h"
14 
15 #include <Debug.h>
16 #include <errno.h>
17 #include <stdlib.h>
18 #include <string.h>
19 #include <unistd.h>
20 #include <syslog.h>
21 
22 #include <new>
23 
24 #include <AGP.h>
25 
26 
27 #undef TRACE
28 #define TRACE_ACCELERANT
29 #ifdef TRACE_ACCELERANT
30 #	define TRACE(x...) _sPrintf("intel_extreme: " x)
31 #else
32 #	define TRACE(x...)
33 #endif
34 
35 #define ERROR(x...) _sPrintf("intel_extreme: " x)
36 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__)
37 
38 
39 struct accelerant_info* gInfo;
40 uint32 gDumpCount;
41 
42 
43 class AreaCloner {
44 public:
45 							AreaCloner();
46 							~AreaCloner();
47 
48 			area_id			Clone(const char* name, void** _address,
49 								uint32 spec, uint32 protection,
50 								area_id sourceArea);
51 			status_t		InitCheck()
52 								{ return fArea < 0 ? (status_t)fArea : B_OK; }
53 			void			Keep();
54 
55 private:
56 			area_id			fArea;
57 };
58 
59 
60 AreaCloner::AreaCloner()
61 	:
62 	fArea(-1)
63 {
64 }
65 
66 
67 AreaCloner::~AreaCloner()
68 {
69 	if (fArea >= 0)
70 		delete_area(fArea);
71 }
72 
73 
74 area_id
75 AreaCloner::Clone(const char* name, void** _address, uint32 spec,
76 	uint32 protection, area_id sourceArea)
77 {
78 	fArea = clone_area(name, _address, spec, protection, sourceArea);
79 	return fArea;
80 }
81 
82 
83 void
84 AreaCloner::Keep()
85 {
86 	fArea = -1;
87 }
88 
89 
90 //	#pragma mark -
91 
92 
93 // intel_reg --mmio=ie-0001.bin --devid=27a2 dump
94 void
95 dump_registers()
96 {
97 	char filename[255];
98 
99 	sprintf(filename, "/boot/system/cache/tmp/ie-%04" B_PRId32 ".bin",
100 		gDumpCount);
101 
102 	ERROR("%s: Taking register dump #%" B_PRId32 "\n", __func__, gDumpCount);
103 
104 	int fd = open(filename, O_CREAT | O_WRONLY, 0644);
105 	uint32 data = 0;
106 	if (fd >= 0) {
107 		for (int32 i = 0; i < 0x80000; i += sizeof(data)) {
108 			//char line[512];
109 			//int length = sprintf(line, "%05" B_PRIx32 ": "
110 			//	"%08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 "\n",
111 			//	i, read32(i), read32(i + 4), read32(i + 8), read32(i + 12));
112 			data = read32(i);
113 			write(fd, &data, sizeof(data));
114 		}
115 		close(fd);
116 		sync();
117 	}
118 
119 	gDumpCount++;
120 }
121 
122 
123 /*! This is the common accelerant_info initializer. It is called by
124 	both, the first accelerant and all clones.
125 */
126 static status_t
127 init_common(int device, bool isClone)
128 {
129 	// initialize global accelerant info structure
130 
131 	// Number of register dumps we have... taken.
132 	gDumpCount = 0;
133 
134 	gInfo = (accelerant_info*)malloc(sizeof(accelerant_info));
135 	if (gInfo == NULL)
136 		return B_NO_MEMORY;
137 
138 	memset(gInfo, 0, sizeof(accelerant_info));
139 
140 	gInfo->is_clone = isClone;
141 	gInfo->device = device;
142 
143 	// get basic info from driver
144 
145 	intel_get_private_data data;
146 	data.magic = INTEL_PRIVATE_DATA_MAGIC;
147 
148 	if (ioctl(device, INTEL_GET_PRIVATE_DATA, &data,
149 			sizeof(intel_get_private_data)) != 0) {
150 		free(gInfo);
151 		return B_ERROR;
152 	}
153 
154 	AreaCloner sharedCloner;
155 	gInfo->shared_info_area = sharedCloner.Clone("intel extreme shared info",
156 		(void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
157 		data.shared_info_area);
158 	status_t status = sharedCloner.InitCheck();
159 	if (status < B_OK) {
160 		free(gInfo);
161 		return status;
162 	}
163 
164 	AreaCloner regsCloner;
165 	gInfo->regs_area = regsCloner.Clone("intel extreme regs",
166 		(void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
167 		gInfo->shared_info->registers_area);
168 	status = regsCloner.InitCheck();
169 	if (status < B_OK) {
170 		free(gInfo);
171 		return status;
172 	}
173 
174 	sharedCloner.Keep();
175 	regsCloner.Keep();
176 
177 	// The overlay registers, hardware status, and cursor memory share
178 	// a single area with the shared_info
179 
180 	if (gInfo->shared_info->overlay_offset != 0) {
181 		gInfo->overlay_registers = (struct overlay_registers*)
182 			(gInfo->shared_info->graphics_memory
183 			+ gInfo->shared_info->overlay_offset);
184 	}
185 
186 	if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x)) {
187 		// allocate some extra memory for the 3D context
188 		if (intel_allocate_memory(INTEL_i965_3D_CONTEXT_SIZE,
189 				B_APERTURE_NON_RESERVED, gInfo->context_base) == B_OK) {
190 			gInfo->context_offset = gInfo->context_base
191 				- (addr_t)gInfo->shared_info->graphics_memory;
192 		}
193 	}
194 
195 	gInfo->pipe_count = 0;
196 
197 	// Allocate all of our pipes
198 	for (int i = 0; i < MAX_PIPES; i++) {
199 		switch (i) {
200 			case 0:
201 				gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_A);
202 				break;
203 			case 1:
204 				gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_B);
205 				break;
206 			default:
207 				ERROR("%s: Unknown pipe %d\n", __func__, i);
208 		}
209 		if (gInfo->pipes[i] == NULL)
210 			ERROR("%s: Error allocating pipe %d\n", __func__, i);
211 		else
212 			gInfo->pipe_count++;
213 	}
214 
215 	return B_OK;
216 }
217 
218 
219 /*! Clean up data common to both primary and cloned accelerant */
220 static void
221 uninit_common(void)
222 {
223 	intel_free_memory(gInfo->context_base);
224 
225 	delete_area(gInfo->regs_area);
226 	delete_area(gInfo->shared_info_area);
227 
228 	gInfo->regs_area = gInfo->shared_info_area = -1;
229 
230 	// close the file handle ONLY if we're the clone
231 	if (gInfo->is_clone)
232 		close(gInfo->device);
233 
234 	free(gInfo);
235 }
236 
237 
238 static void
239 dump_ports()
240 {
241 	if (gInfo->port_count == 0) {
242 		TRACE("%s: No ports connected\n", __func__);
243 		return;
244 	}
245 
246 	TRACE("%s: Connected ports: (port_count: %" B_PRIu32 ")\n", __func__,
247 		gInfo->port_count);
248 
249 	for (uint32 i = 0; i < gInfo->port_count; i++) {
250 		Port* port = gInfo->ports[i];
251 		if (!port) {
252 			TRACE("port %" B_PRIu32 ":: INVALID ALLOC!\n", i);
253 			continue;
254 		}
255 		TRACE("port %" B_PRIu32 ": %s %s\n", i, port->PortName(),
256 			port->IsConnected() ? "connected" : "disconnected");
257 	}
258 }
259 
260 
261 static bool
262 has_connected_port(port_index portIndex, uint32 type)
263 {
264 	for (uint32 i = 0; i < gInfo->port_count; i++) {
265 		Port* port = gInfo->ports[i];
266 		if (type != INTEL_PORT_TYPE_ANY && port->Type() != type)
267 			continue;
268 		if (portIndex != INTEL_PORT_ANY && port->PortIndex() != portIndex)
269 			continue;
270 
271 		return true;
272 	}
273 
274 	return false;
275 }
276 
277 
278 static status_t
279 probe_ports()
280 {
281 	// Try to determine what ports to use. We use the following heuristic:
282 	// * Check for DisplayPort, these can be more or less detected reliably.
283 	// * Check for HDMI, it'll fail on devices not having HDMI for us to fall
284 	//   back to DVI.
285 	// * Assume DVI B if no HDMI and no DisplayPort is present, confirmed by
286 	//   reading EDID in the IsConnected() call.
287 	// * Check for analog if possible (there's a detection bit on PCH),
288 	//   otherwise the assumed presence is confirmed by reading EDID in
289 	//   IsConnected().
290 
291 	TRACE("adpa: %08" B_PRIx32 "\n", read32(INTEL_ANALOG_PORT));
292 	TRACE("dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32
293 		", dovc: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_PORT_A),
294 		read32(INTEL_DIGITAL_PORT_B), read32(INTEL_DIGITAL_PORT_C));
295 	TRACE("lvds: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_LVDS_PORT));
296 
297 	bool foundLVDS = false;
298 
299 	gInfo->port_count = 0;
300 	for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) {
301 		TRACE("Probing DisplayPort %d", i);
302 		Port* displayPort = new(std::nothrow) DisplayPort((port_index)i);
303 		if (displayPort == NULL)
304 			return B_NO_MEMORY;
305 
306 		if (displayPort->IsConnected())
307 			gInfo->ports[gInfo->port_count++] = displayPort;
308 		else
309 			delete displayPort;
310 	}
311 
312 	// Digital Display Interface
313 	if (gInfo->shared_info->device_type.HasDDI()) {
314 		for (int i = INTEL_PORT_A; i <= INTEL_PORT_E; i++) {
315 			TRACE("Probing DDI %d", i);
316 
317 			Port* ddiPort
318 				= new(std::nothrow) DigitalDisplayInterface((port_index)i);
319 
320 			if (ddiPort == NULL)
321 				return B_NO_MEMORY;
322 
323 			if (ddiPort->IsConnected())
324 				gInfo->ports[gInfo->port_count++] = ddiPort;
325 			else
326 				delete ddiPort;
327 		}
328 	}
329 
330 	// Ensure DP_A isn't already taken (or DDI)
331 	TRACE("Probing eDP");
332 	if (!has_connected_port((port_index)INTEL_PORT_A, INTEL_PORT_TYPE_ANY)) {
333 		// also always try eDP, it'll also just fail if not applicable
334 		Port* eDPPort = new(std::nothrow) EmbeddedDisplayPort();
335 		if (eDPPort == NULL)
336 			return B_NO_MEMORY;
337 		if (eDPPort->IsConnected())
338 			gInfo->ports[gInfo->port_count++] = eDPPort;
339 		else
340 			delete eDPPort;
341 	}
342 
343 	for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) {
344 		TRACE("Probing HDMI %d", i);
345 		if (has_connected_port((port_index)i, INTEL_PORT_TYPE_ANY)) {
346 			// Ensure port not already claimed by something like DDI
347 			continue;
348 		}
349 
350 		Port* hdmiPort = new(std::nothrow) HDMIPort((port_index)i);
351 		if (hdmiPort == NULL)
352 			return B_NO_MEMORY;
353 
354 		if (hdmiPort->IsConnected())
355 			gInfo->ports[gInfo->port_count++] = hdmiPort;
356 		else
357 			delete hdmiPort;
358 	}
359 
360 	TRACE("Probing DVI");
361 	if (!has_connected_port(INTEL_PORT_ANY, INTEL_PORT_TYPE_ANY)) {
362 		// there's neither DisplayPort nor HDMI so far, assume DVI B
363 		Port* dviPort = new(std::nothrow) DigitalPort(INTEL_PORT_B);
364 		if (dviPort == NULL)
365 			return B_NO_MEMORY;
366 
367 		if (dviPort->IsConnected()) {
368 			gInfo->ports[gInfo->port_count++] = dviPort;
369 			gInfo->head_mode |= HEAD_MODE_B_DIGITAL;
370 		} else
371 			delete dviPort;
372 	}
373 
374 	// always try the LVDS port, it'll simply fail if not applicable
375 	TRACE("Probing LVDS");
376 	Port* lvdsPort = new(std::nothrow) LVDSPort();
377 	if (lvdsPort == NULL)
378 		return B_NO_MEMORY;
379 	if (lvdsPort->IsConnected()) {
380 		foundLVDS = true;
381 		gInfo->ports[gInfo->port_count++] = lvdsPort;
382 		gInfo->head_mode |= HEAD_MODE_LVDS_PANEL;
383 		gInfo->head_mode |= HEAD_MODE_A_ANALOG;
384 			// FIXME this should not be set, but without it, LVDS modesetting
385 			// doesn't work on SandyBridge. Find out why it makes a difference.
386 		gInfo->head_mode |= HEAD_MODE_B_DIGITAL;
387 	} else
388 		delete lvdsPort;
389 
390 	// then finally always try the analog port
391 	TRACE("Probing Analog");
392 	Port* analogPort = new(std::nothrow) AnalogPort();
393 	if (analogPort == NULL)
394 		return B_NO_MEMORY;
395 	if (analogPort->IsConnected()) {
396 		gInfo->ports[gInfo->port_count++] = analogPort;
397 		gInfo->head_mode |= HEAD_MODE_A_ANALOG;
398 	} else
399 		delete analogPort;
400 
401 	if (gInfo->port_count == 0)
402 		return B_ERROR;
403 
404 	// Activate reference clocks if needed
405 	if (gInfo->shared_info->pch_info == INTEL_PCH_IBX
406 		|| gInfo->shared_info->pch_info == INTEL_PCH_CPT) {
407 		TRACE("Activating clocks");
408 		// XXX: Is LVDS the same as Panel?
409 		refclk_activate_ilk(foundLVDS);
410 	}
411 	/*
412 	} else if (gInfo->shared_info->pch_info == INTEL_PCH_LPT) {
413 		// TODO: Some kind of stepped bend thing?
414 		// only needed for vga
415 		refclk_activate_lpt(foundLVDS);
416 	}
417 	*/
418 
419 	TRACE("Probing complete.");
420 	return B_OK;
421 }
422 
423 
424 static status_t
425 assign_pipes()
426 {
427 	// TODO: At some point we should "group" ports to pipes with the same mode.
428 	// You can drive multiple ports from a single pipe as long as the mode is
429 	// the same. For the moment we could get displays with the wrong pipes
430 	// assigned when the count is > 1;
431 
432 	uint32 current = 0;
433 	for (uint32 i = 0; i < gInfo->port_count; i++) {
434 		if (gInfo->ports[i] == NULL)
435 			continue;
436 
437 		pipe_index preference = gInfo->ports[i]->PipePreference();
438 		if (preference != INTEL_PIPE_ANY) {
439 			// Some ports *really* need to be assigned a pipe due to
440 			// implementation bugs.
441 			int index = (preference == INTEL_PIPE_B) ? 1 : 0;
442 			gInfo->ports[i]->SetPipe(gInfo->pipes[index]);
443 			continue;
444 		}
445 
446 		if (gInfo->ports[i]->IsConnected()) {
447 			if (current >= gInfo->pipe_count) {
448 				ERROR("%s: No pipes left to assign to port %s!\n", __func__,
449 					gInfo->ports[i]->PortName());
450 				continue;
451 			}
452 
453 			gInfo->ports[i]->SetPipe(gInfo->pipes[current]);
454 			current++;
455 		}
456 	}
457 
458 	return B_OK;
459 }
460 
461 
462 //	#pragma mark - public accelerant functions
463 
464 
465 /*! Init primary accelerant */
466 status_t
467 intel_init_accelerant(int device)
468 {
469 	CALLED();
470 
471 	status_t status = init_common(device, false);
472 	if (status != B_OK)
473 		return status;
474 
475 	intel_shared_info &info = *gInfo->shared_info;
476 
477 	init_lock(&info.accelerant_lock, "intel extreme accelerant");
478 	init_lock(&info.engine_lock, "intel extreme engine");
479 
480 	setup_ring_buffer(info.primary_ring_buffer, "intel primary ring buffer");
481 
482 	TRACE("pipe control for: 0x%" B_PRIx32 " 0x%" B_PRIx32 "\n",
483 		read32(INTEL_PIPE_CONTROL), read32(INTEL_PIPE_CONTROL));
484 
485 	// Probe all ports
486 	status = probe_ports();
487 
488 	// On TRACE, dump ports and states
489 	dump_ports();
490 
491 	if (status != B_OK)
492 		ERROR("Warning: zero active displays were found!\n");
493 
494 	status = assign_pipes();
495 
496 	if (status != B_OK)
497 		ERROR("Warning: error while assigning pipes!\n");
498 
499 	status = create_mode_list();
500 	if (status != B_OK) {
501 		uninit_common();
502 		return status;
503 	}
504 
505 	return B_OK;
506 }
507 
508 
509 ssize_t
510 intel_accelerant_clone_info_size(void)
511 {
512 	CALLED();
513 	// clone info is device name, so return its maximum size
514 	return B_PATH_NAME_LENGTH;
515 }
516 
517 
518 void
519 intel_get_accelerant_clone_info(void* info)
520 {
521 	CALLED();
522 	ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH);
523 }
524 
525 
526 status_t
527 intel_clone_accelerant(void* info)
528 {
529 	CALLED();
530 
531 	// create full device name
532 	char path[B_PATH_NAME_LENGTH];
533 	strcpy(path, "/dev/");
534 #ifdef __HAIKU__
535 	strlcat(path, (const char*)info, sizeof(path));
536 #else
537 	strcat(path, (const char*)info);
538 #endif
539 
540 	int fd = open(path, B_READ_WRITE);
541 	if (fd < 0)
542 		return errno;
543 
544 	status_t status = init_common(fd, true);
545 	if (status != B_OK)
546 		goto err1;
547 
548 	// get read-only clone of supported display modes
549 	status = gInfo->mode_list_area = clone_area(
550 		"intel extreme cloned modes", (void**)&gInfo->mode_list,
551 		B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area);
552 	if (status < B_OK)
553 		goto err2;
554 
555 	return B_OK;
556 
557 err2:
558 	uninit_common();
559 err1:
560 	close(fd);
561 	return status;
562 }
563 
564 
565 /*! This function is called for both, the primary accelerant and all of
566 	its clones.
567 */
568 void
569 intel_uninit_accelerant(void)
570 {
571 	CALLED();
572 
573 	// delete accelerant instance data
574 	delete_area(gInfo->mode_list_area);
575 	gInfo->mode_list = NULL;
576 
577 	intel_shared_info &info = *gInfo->shared_info;
578 
579 	uninit_lock(&info.accelerant_lock);
580 	uninit_lock(&info.engine_lock);
581 
582 	uninit_ring_buffer(info.primary_ring_buffer);
583 
584 	uninit_common();
585 }
586 
587 
588 status_t
589 intel_get_accelerant_device_info(accelerant_device_info* info)
590 {
591 	CALLED();
592 
593 	info->version = B_ACCELERANT_VERSION;
594 
595 	DeviceType* type = &gInfo->shared_info->device_type;
596 
597 	if (type->InFamily(INTEL_FAMILY_7xx) || type->InFamily(INTEL_FAMILY_8xx))
598 		strcpy(info->name, "Intel Extreme");
599 	else if (type->InFamily(INTEL_FAMILY_9xx))
600 		strcpy(info->name, "Intel GMA");
601 	else if (type->InFamily(INTEL_FAMILY_POVR))
602 		strcpy(info->name, "Intel PowerVR");
603 	else if (type->InFamily(INTEL_FAMILY_SOC0))
604 		strcpy(info->name, "Intel Atom");
605 	else if (type->InFamily(INTEL_FAMILY_SER5))
606 		strcpy(info->name, "Intel HD/Iris");
607 	else
608 		strcpy(info->name, "Intel");
609 
610 	strcpy(info->chipset, gInfo->shared_info->device_identifier);
611 	strcpy(info->serial_no, "None");
612 
613 	info->memory = gInfo->shared_info->graphics_memory_size;
614 	info->dac_speed = gInfo->shared_info->pll_info.max_frequency;
615 
616 	return B_OK;
617 }
618 
619 
620 sem_id
621 intel_accelerant_retrace_semaphore()
622 {
623 	CALLED();
624 	return gInfo->shared_info->vblank_sem;
625 }
626