1 /* 2 * Copyright 2006-2016, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 */ 8 9 10 #include "accelerant_protos.h" 11 #include "accelerant.h" 12 13 #include "utility.h" 14 15 #include <Debug.h> 16 #include <errno.h> 17 #include <stdlib.h> 18 #include <string.h> 19 #include <unistd.h> 20 #include <syslog.h> 21 22 #include <new> 23 24 #include <AGP.h> 25 #include <AutoDeleterOS.h> 26 27 28 #undef TRACE 29 #define TRACE_ACCELERANT 30 #ifdef TRACE_ACCELERANT 31 # define TRACE(x...) _sPrintf("intel_extreme: " x) 32 #else 33 # define TRACE(x...) 34 #endif 35 36 #define ERROR(x...) _sPrintf("intel_extreme: " x) 37 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__) 38 39 40 struct accelerant_info* gInfo; 41 uint32 gDumpCount; 42 43 44 // #pragma mark - 45 46 47 // intel_reg --mmio=ie-0001.bin --devid=27a2 dump 48 void 49 dump_registers() 50 { 51 char filename[255]; 52 53 sprintf(filename, "/boot/system/cache/tmp/ie-%04" B_PRId32 ".bin", 54 gDumpCount); 55 56 ERROR("%s: Taking register dump #%" B_PRId32 "\n", __func__, gDumpCount); 57 58 int fd = open(filename, O_CREAT | O_WRONLY, 0644); 59 uint32 data = 0; 60 if (fd >= 0) { 61 for (int32 i = 0; i < 0x80000; i += sizeof(data)) { 62 //char line[512]; 63 //int length = sprintf(line, "%05" B_PRIx32 ": " 64 // "%08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 "\n", 65 // i, read32(i), read32(i + 4), read32(i + 8), read32(i + 12)); 66 data = read32(i); 67 write(fd, &data, sizeof(data)); 68 } 69 close(fd); 70 sync(); 71 } 72 73 gDumpCount++; 74 } 75 76 77 /*! This is the common accelerant_info initializer. It is called by 78 both, the first accelerant and all clones. 79 */ 80 static status_t 81 init_common(int device, bool isClone) 82 { 83 // initialize global accelerant info structure 84 85 // Number of register dumps we have... taken. 86 gDumpCount = 0; 87 88 gInfo = (accelerant_info*)malloc(sizeof(accelerant_info)); 89 if (gInfo == NULL) 90 return B_NO_MEMORY; 91 MemoryDeleter infoDeleter(gInfo); 92 93 memset(gInfo, 0, sizeof(accelerant_info)); 94 95 gInfo->is_clone = isClone; 96 gInfo->device = device; 97 98 // get basic info from driver 99 100 intel_get_private_data data; 101 data.magic = INTEL_PRIVATE_DATA_MAGIC; 102 103 if (ioctl(device, INTEL_GET_PRIVATE_DATA, &data, 104 sizeof(intel_get_private_data)) != 0) 105 return B_ERROR; 106 107 AreaDeleter sharedDeleter(clone_area("intel extreme shared info", 108 (void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 109 data.shared_info_area)); 110 status_t status = gInfo->shared_info_area = sharedDeleter.Get(); 111 if (status < B_OK) 112 return status; 113 114 AreaDeleter regsDeleter(clone_area("intel extreme regs", 115 (void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 116 gInfo->shared_info->registers_area)); 117 status = gInfo->regs_area = regsDeleter.Get(); 118 if (status < B_OK) 119 return status; 120 121 infoDeleter.Detach(); 122 sharedDeleter.Detach(); 123 regsDeleter.Detach(); 124 125 // The overlay registers, hardware status, and cursor memory share 126 // a single area with the shared_info 127 128 if (gInfo->shared_info->overlay_offset != 0) { 129 gInfo->overlay_registers = (struct overlay_registers*) 130 (gInfo->shared_info->graphics_memory 131 + gInfo->shared_info->overlay_offset); 132 } 133 134 if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x)) { 135 // allocate some extra memory for the 3D context 136 if (intel_allocate_memory(INTEL_i965_3D_CONTEXT_SIZE, 137 B_APERTURE_NON_RESERVED, gInfo->context_base) == B_OK) { 138 gInfo->context_offset = gInfo->context_base 139 - (addr_t)gInfo->shared_info->graphics_memory; 140 } 141 } 142 143 gInfo->pipe_count = 0; 144 145 // Allocate all of our pipes 146 int pipeCnt = 2; 147 if (gInfo->shared_info->device_type.Generation() >= 12) 148 pipeCnt = 4; 149 else if (gInfo->shared_info->device_type.Generation() >= 7) 150 pipeCnt = 3; 151 152 for (int i = 0; i < pipeCnt; i++) { 153 switch (i) { 154 case 0: 155 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_A); 156 break; 157 case 1: 158 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_B); 159 break; 160 case 2: 161 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_C); 162 break; 163 case 3: 164 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_D); 165 break; 166 default: 167 ERROR("%s: Unknown pipe %d\n", __func__, i); 168 } 169 if (gInfo->pipes[i] == NULL) 170 ERROR("%s: Error allocating pipe %d\n", __func__, i); 171 else 172 gInfo->pipe_count++; 173 } 174 175 return B_OK; 176 } 177 178 179 /*! Clean up data common to both primary and cloned accelerant */ 180 static void 181 uninit_common(void) 182 { 183 intel_free_memory(gInfo->context_base); 184 185 delete_area(gInfo->regs_area); 186 delete_area(gInfo->shared_info_area); 187 188 gInfo->regs_area = gInfo->shared_info_area = -1; 189 190 // close the file handle ONLY if we're the clone 191 if (gInfo->is_clone) 192 close(gInfo->device); 193 194 free(gInfo); 195 } 196 197 198 static void 199 dump_ports() 200 { 201 if (gInfo->port_count == 0) { 202 TRACE("%s: No ports connected\n", __func__); 203 return; 204 } 205 206 TRACE("%s: Connected ports: (port_count: %" B_PRIu32 ")\n", __func__, 207 gInfo->port_count); 208 209 for (uint32 i = 0; i < gInfo->port_count; i++) { 210 Port* port = gInfo->ports[i]; 211 if (!port) { 212 TRACE("port %" B_PRIu32 ":: INVALID ALLOC!\n", i); 213 continue; 214 } 215 TRACE("port %" B_PRIu32 ": %s %s\n", i, port->PortName(), 216 port->IsConnected() ? "connected" : "disconnected"); 217 } 218 } 219 220 221 static bool 222 has_connected_port(port_index portIndex, uint32 type) 223 { 224 for (uint32 i = 0; i < gInfo->port_count; i++) { 225 Port* port = gInfo->ports[i]; 226 if (type != INTEL_PORT_TYPE_ANY && port->Type() != type) 227 continue; 228 if (portIndex != INTEL_PORT_ANY && port->PortIndex() != portIndex) 229 continue; 230 231 return true; 232 } 233 234 return false; 235 } 236 237 238 static status_t 239 probe_ports() 240 { 241 // Try to determine what ports to use. We use the following heuristic: 242 // * Check for DisplayPort, these can be more or less detected reliably. 243 // * Check for HDMI, it'll fail on devices not having HDMI for us to fall 244 // back to DVI. 245 // * Assume DVI B if no HDMI and no DisplayPort is present, confirmed by 246 // reading EDID in the IsConnected() call. 247 // * Check for analog if possible (there's a detection bit on PCH), 248 // otherwise the assumed presence is confirmed by reading EDID in 249 // IsConnected(). 250 251 TRACE("adpa: %08" B_PRIx32 "\n", read32(INTEL_ANALOG_PORT)); 252 TRACE("dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32 253 ", dovc: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_PORT_A), 254 read32(INTEL_DIGITAL_PORT_B), read32(INTEL_DIGITAL_PORT_C)); 255 TRACE("lvds: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_LVDS_PORT)); 256 257 TRACE("dp_a: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_A)); 258 TRACE("dp_b: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_B)); 259 TRACE("dp_c: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_C)); 260 TRACE("dp_d: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_D)); 261 TRACE("tra_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_A_DP_CTL)); 262 TRACE("trb_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_B_DP_CTL)); 263 TRACE("trc_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_C_DP_CTL)); 264 265 bool foundLVDS = false; 266 bool foundDP = false; 267 bool foundDDI = false; 268 269 gInfo->port_count = 0; 270 #if 0 271 // make sure I2C hardware controller is off (we use bit-banging) 272 if (gInfo->shared_info->device_type.Generation() >= 5) { 273 write32(INTEL_DSPCLK_GATE_D, 274 read32(INTEL_DSPCLK_GATE_D) | PCH_GMBUSUNIT_CLK_GATE_DIS); 275 read32(INTEL_DSPCLK_GATE_D); 276 277 write32(INTEL_GEN9_CLKGATE_DIS_4, 278 read32(INTEL_GEN9_CLKGATE_DIS_4) | BXT_GMBUSUNIT_CLK_GATE_DIS); 279 read32(INTEL_GEN9_CLKGATE_DIS_4); 280 281 write32(INTEL_GMBUS0, 0); //reset, idle 282 write32(INTEL_GMBUS4, 0); //block interrupts 283 } 284 #endif 285 286 // Display Port 287 if (!gInfo->shared_info->device_type.HasDDI()) { 288 for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) { 289 TRACE("Probing DisplayPort %d\n", i); 290 Port* displayPort = new(std::nothrow) DisplayPort((port_index)i); 291 if (displayPort == NULL) 292 return B_NO_MEMORY; 293 294 if (displayPort->IsConnected()) { 295 foundDP = true; 296 gInfo->ports[gInfo->port_count++] = displayPort; 297 } else 298 delete displayPort; 299 } 300 } 301 302 // Digital Display Interface (for DP, HDMI, DVI and eDP) 303 if (gInfo->shared_info->device_type.HasDDI()) { 304 for (int i = INTEL_PORT_A; i <= INTEL_PORT_F; i++) { 305 TRACE("Probing DDI %d\n", i); 306 307 Port* ddiPort 308 = new(std::nothrow) DigitalDisplayInterface((port_index)i); 309 310 if (ddiPort == NULL) 311 return B_NO_MEMORY; 312 313 if (ddiPort->IsConnected()) { 314 foundDDI = true; 315 gInfo->ports[gInfo->port_count++] = ddiPort; 316 } else 317 delete ddiPort; 318 } 319 } 320 321 #if 0 322 // never execute this as the 'standard' DisplayPort class called above already handles it. 323 if (!gInfo->shared_info->device_type.HasDDI()) { 324 // Ensure DP_A isn't already taken 325 TRACE("Probing eDP\n"); 326 if (!has_connected_port((port_index)INTEL_PORT_A, INTEL_PORT_TYPE_ANY)) { 327 // also always try eDP, it'll also just fail if not applicable 328 Port* eDPPort = new(std::nothrow) EmbeddedDisplayPort(); 329 if (eDPPort == NULL) 330 return B_NO_MEMORY; 331 if (eDPPort->IsConnected()) 332 gInfo->ports[gInfo->port_count++] = eDPPort; 333 else 334 delete eDPPort; 335 } 336 } 337 #endif 338 339 if (!gInfo->shared_info->device_type.HasDDI()) { 340 for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) { 341 TRACE("Probing HDMI %d\n", i); 342 if (has_connected_port((port_index)i, INTEL_PORT_TYPE_ANY)) { 343 // Ensure port not already claimed by something like DDI 344 TRACE("Port already claimed\n"); 345 continue; 346 } 347 348 Port* hdmiPort = new(std::nothrow) HDMIPort((port_index)i); 349 if (hdmiPort == NULL) 350 return B_NO_MEMORY; 351 352 if (hdmiPort->IsConnected()) 353 gInfo->ports[gInfo->port_count++] = hdmiPort; 354 else 355 delete hdmiPort; 356 } 357 } 358 359 // always try the LVDS port when chipset supports it, it'll simply fail if not applicable 360 if (!gInfo->shared_info->device_type.HasDDI()) { 361 TRACE("Probing LVDS\n"); 362 Port* lvdsPort = new(std::nothrow) LVDSPort(); 363 if (lvdsPort == NULL) 364 return B_NO_MEMORY; 365 if (lvdsPort->IsConnected()) { 366 foundLVDS = true; 367 gInfo->ports[gInfo->port_count++] = lvdsPort; 368 gInfo->head_mode |= HEAD_MODE_LVDS_PANEL; 369 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 370 } else 371 delete lvdsPort; 372 } 373 374 if (!gInfo->shared_info->device_type.HasDDI()) { 375 if (!has_connected_port(INTEL_PORT_ANY, INTEL_PORT_TYPE_ANY)) { 376 TRACE("Probing DVI\n"); 377 // there's neither DisplayPort nor HDMI so far, assume DVI B 378 for (port_index index = INTEL_PORT_B; index <= INTEL_PORT_C; 379 index = (port_index)(index + 1)) { 380 Port* dviPort = new(std::nothrow) DigitalPort(index, "DVI"); 381 if (dviPort == NULL) 382 return B_NO_MEMORY; 383 384 if (dviPort->IsConnected()) { 385 gInfo->ports[gInfo->port_count++] = dviPort; 386 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 387 } else 388 delete dviPort; 389 } 390 } 391 } 392 393 // then finally always try the analog port when chipsets supports it 394 if (gInfo->shared_info->device_type.Generation() <= 8) { 395 TRACE("Probing Analog\n"); 396 Port* analogPort = new(std::nothrow) AnalogPort(); 397 if (analogPort == NULL) 398 return B_NO_MEMORY; 399 if (analogPort->IsConnected()) { 400 gInfo->ports[gInfo->port_count++] = analogPort; 401 gInfo->head_mode |= HEAD_MODE_A_ANALOG; 402 } else 403 delete analogPort; 404 } 405 406 if (gInfo->port_count == 0) 407 return B_ERROR; 408 409 // Activate reference clocks if needed 410 if (gInfo->shared_info->pch_info == INTEL_PCH_IBX 411 || gInfo->shared_info->pch_info == INTEL_PCH_CPT) { 412 TRACE("Activating clocks\n"); 413 refclk_activate_ilk(foundLVDS || foundDP || foundDDI); 414 } 415 /* 416 } else if (gInfo->shared_info->pch_info == INTEL_PCH_LPT) { 417 // TODO: Some kind of stepped bend thing? 418 // only needed for vga 419 refclk_activate_lpt(foundLVDS); 420 } 421 */ 422 423 TRACE("Probing complete.\n"); 424 return B_OK; 425 } 426 427 428 static status_t 429 assign_pipes() 430 { 431 // TODO: At some point we should "group" ports to pipes with the same mode. 432 // You can drive multiple ports from a single pipe as long as the mode is 433 // the same. For the moment we could get displays with the wrong pipes 434 // assigned when the count is > 1; 435 436 uint32 current = 0; 437 438 bool assigned[gInfo->pipe_count]; 439 memset(assigned, 0, gInfo->pipe_count); 440 441 // Some ports need to be assigned to a fixed pipe on old hardware (or due 442 // to limitations in the current driver on current hardware). Assign those 443 // first 444 for (uint32 i = 0; i < gInfo->port_count; i++) { 445 if (!gInfo->ports[i]->IsConnected()) 446 continue; 447 448 pipe_index preference = gInfo->ports[i]->PipePreference(); 449 if (preference != INTEL_PIPE_ANY) { 450 int index = (int)preference - 1; 451 if (assigned[index]) { 452 TRACE("Pipe %d is already assigned, it will drive multiple " 453 "displays\n", index); 454 } 455 gInfo->ports[i]->SetPipe(gInfo->pipes[index]); 456 assigned[index] = true; 457 continue; 458 } 459 } 460 461 // In a second pass, assign the remaining ports to the remaining pipes 462 for (uint32 i = 0; i < gInfo->port_count; i++) { 463 if (gInfo->ports[i]->IsConnected() && gInfo->ports[i]->GetPipe() == NULL) { 464 while (current < gInfo->pipe_count && assigned[current]) 465 current++; 466 467 if (current >= gInfo->pipe_count) { 468 ERROR("%s: No pipes left to assign to port %s!\n", __func__, 469 gInfo->ports[i]->PortName()); 470 continue; 471 } 472 473 gInfo->ports[i]->SetPipe(gInfo->pipes[current]); 474 assigned[current] = true; 475 } 476 } 477 478 return B_OK; 479 } 480 481 482 // #pragma mark - public accelerant functions 483 484 485 /*! Init primary accelerant */ 486 status_t 487 intel_init_accelerant(int device) 488 { 489 CALLED(); 490 491 status_t status = init_common(device, false); 492 if (status != B_OK) 493 return status; 494 495 intel_shared_info &info = *gInfo->shared_info; 496 497 init_lock(&info.accelerant_lock, "intel extreme accelerant"); 498 init_lock(&info.engine_lock, "intel extreme engine"); 499 500 setup_ring_buffer(info.primary_ring_buffer, "intel primary ring buffer"); 501 502 // Probe all ports 503 status = probe_ports(); 504 505 // On TRACE, dump ports and states 506 dump_ports(); 507 508 if (status != B_OK) 509 ERROR("Warning: zero active displays were found!\n"); 510 511 status = assign_pipes(); 512 513 if (status != B_OK) 514 ERROR("Warning: error while assigning pipes!\n"); 515 516 status = create_mode_list(); 517 if (status != B_OK) { 518 uninit_common(); 519 return status; 520 } 521 522 return B_OK; 523 } 524 525 526 ssize_t 527 intel_accelerant_clone_info_size(void) 528 { 529 CALLED(); 530 // clone info is device name, so return its maximum size 531 return B_PATH_NAME_LENGTH; 532 } 533 534 535 void 536 intel_get_accelerant_clone_info(void* info) 537 { 538 CALLED(); 539 ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH); 540 } 541 542 543 status_t 544 intel_clone_accelerant(void* info) 545 { 546 CALLED(); 547 548 // create full device name 549 char path[B_PATH_NAME_LENGTH]; 550 strcpy(path, "/dev/"); 551 #ifdef __HAIKU__ 552 strlcat(path, (const char*)info, sizeof(path)); 553 #else 554 strcat(path, (const char*)info); 555 #endif 556 557 int fd = open(path, B_READ_WRITE); 558 if (fd < 0) 559 return errno; 560 561 status_t status = init_common(fd, true); 562 if (status != B_OK) 563 goto err1; 564 565 // get read-only clone of supported display modes 566 status = gInfo->mode_list_area = clone_area( 567 "intel extreme cloned modes", (void**)&gInfo->mode_list, 568 B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area); 569 if (status < B_OK) 570 goto err2; 571 572 return B_OK; 573 574 err2: 575 uninit_common(); 576 err1: 577 close(fd); 578 return status; 579 } 580 581 582 /*! This function is called for both, the primary accelerant and all of 583 its clones. 584 */ 585 void 586 intel_uninit_accelerant(void) 587 { 588 CALLED(); 589 590 // delete accelerant instance data 591 delete_area(gInfo->mode_list_area); 592 gInfo->mode_list = NULL; 593 594 if (!gInfo->is_clone) { 595 intel_shared_info &info = *gInfo->shared_info; 596 uninit_lock(&info.accelerant_lock); 597 uninit_lock(&info.engine_lock); 598 uninit_ring_buffer(info.primary_ring_buffer); 599 } 600 uninit_common(); 601 } 602 603 604 status_t 605 intel_get_accelerant_device_info(accelerant_device_info* info) 606 { 607 CALLED(); 608 609 info->version = B_ACCELERANT_VERSION; 610 611 DeviceType* type = &gInfo->shared_info->device_type; 612 613 if (type->InFamily(INTEL_FAMILY_8xx)) 614 strcpy(info->name, "Intel Extreme"); 615 else if (type->InFamily(INTEL_FAMILY_9xx)) 616 strcpy(info->name, "Intel GMA"); 617 else if (type->InFamily(INTEL_FAMILY_SOC0)) 618 strcpy(info->name, "Intel Atom"); 619 else if (type->InFamily(INTEL_FAMILY_SER5)) 620 strcpy(info->name, "Intel HD/Iris"); 621 else 622 strcpy(info->name, "Intel"); 623 624 strcpy(info->chipset, gInfo->shared_info->device_identifier); 625 strcpy(info->serial_no, "None"); 626 627 info->memory = gInfo->shared_info->graphics_memory_size; 628 info->dac_speed = gInfo->shared_info->pll_info.max_frequency; 629 630 return B_OK; 631 } 632 633 634 sem_id 635 intel_accelerant_retrace_semaphore() 636 { 637 CALLED(); 638 return gInfo->shared_info->vblank_sem; 639 } 640