xref: /haiku/src/add-ons/accelerants/intel_extreme/accelerant.cpp (revision 4c8e85b316c35a9161f5a1c50ad70bc91c83a76f)
1 /*
2  * Copyright 2006-2016, Haiku, Inc. All Rights Reserved.
3  * Distributed under the terms of the MIT License.
4  *
5  * Authors:
6  *		Axel Dörfler, axeld@pinc-software.de
7  */
8 
9 
10 #include "accelerant_protos.h"
11 #include "accelerant.h"
12 
13 #include "utility.h"
14 
15 #include <Debug.h>
16 #include <errno.h>
17 #include <stdlib.h>
18 #include <string.h>
19 #include <unistd.h>
20 #include <syslog.h>
21 
22 #include <new>
23 
24 #include <AGP.h>
25 #include <AutoDeleterOS.h>
26 
27 
28 #undef TRACE
29 #define TRACE_ACCELERANT
30 #ifdef TRACE_ACCELERANT
31 #	define TRACE(x...) _sPrintf("intel_extreme: " x)
32 #else
33 #	define TRACE(x...)
34 #endif
35 
36 #define ERROR(x...) _sPrintf("intel_extreme: " x)
37 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__)
38 
39 
40 struct accelerant_info* gInfo;
41 uint32 gDumpCount;
42 
43 
44 //	#pragma mark -
45 
46 
47 // intel_reg --mmio=ie-0001.bin --devid=27a2 dump
48 void
49 dump_registers()
50 {
51 	char filename[255];
52 
53 	sprintf(filename, "/boot/system/cache/tmp/ie-%04" B_PRId32 ".bin",
54 		gDumpCount);
55 
56 	ERROR("%s: Taking register dump #%" B_PRId32 "\n", __func__, gDumpCount);
57 
58 	int fd = open(filename, O_CREAT | O_WRONLY, 0644);
59 	uint32 data = 0;
60 	if (fd >= 0) {
61 		for (int32 i = 0; i < 0x80000; i += sizeof(data)) {
62 			//char line[512];
63 			//int length = sprintf(line, "%05" B_PRIx32 ": "
64 			//	"%08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 "\n",
65 			//	i, read32(i), read32(i + 4), read32(i + 8), read32(i + 12));
66 			data = read32(i);
67 			write(fd, &data, sizeof(data));
68 		}
69 		close(fd);
70 		sync();
71 	}
72 
73 	gDumpCount++;
74 }
75 
76 
77 /*! This is the common accelerant_info initializer. It is called by
78 	both, the first accelerant and all clones.
79 */
80 static status_t
81 init_common(int device, bool isClone)
82 {
83 	// initialize global accelerant info structure
84 
85 	// Number of register dumps we have... taken.
86 	gDumpCount = 0;
87 
88 	gInfo = (accelerant_info*)malloc(sizeof(accelerant_info));
89 	if (gInfo == NULL)
90 		return B_NO_MEMORY;
91 	MemoryDeleter infoDeleter(gInfo);
92 
93 	memset(gInfo, 0, sizeof(accelerant_info));
94 
95 	gInfo->is_clone = isClone;
96 	gInfo->device = device;
97 
98 	// get basic info from driver
99 
100 	intel_get_private_data data;
101 	data.magic = INTEL_PRIVATE_DATA_MAGIC;
102 
103 	if (ioctl(device, INTEL_GET_PRIVATE_DATA, &data,
104 			sizeof(intel_get_private_data)) != 0)
105 		return B_ERROR;
106 
107 	AreaDeleter sharedDeleter(clone_area("intel extreme shared info",
108 		(void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
109 		data.shared_info_area));
110 	status_t status = gInfo->shared_info_area = sharedDeleter.Get();
111 	if (status < B_OK)
112 		return status;
113 
114 	AreaDeleter regsDeleter(clone_area("intel extreme regs",
115 		(void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
116 		gInfo->shared_info->registers_area));
117 	status = gInfo->regs_area = regsDeleter.Get();
118 	if (status < B_OK)
119 		return status;
120 
121 	infoDeleter.Detach();
122 	sharedDeleter.Detach();
123 	regsDeleter.Detach();
124 
125 	// The overlay registers, hardware status, and cursor memory share
126 	// a single area with the shared_info
127 
128 	if (gInfo->shared_info->overlay_offset != 0) {
129 		gInfo->overlay_registers = (struct overlay_registers*)
130 			(gInfo->shared_info->graphics_memory
131 			+ gInfo->shared_info->overlay_offset);
132 	}
133 
134 	if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x)) {
135 		// allocate some extra memory for the 3D context
136 		if (intel_allocate_memory(INTEL_i965_3D_CONTEXT_SIZE,
137 				B_APERTURE_NON_RESERVED, gInfo->context_base) == B_OK) {
138 			gInfo->context_offset = gInfo->context_base
139 				- (addr_t)gInfo->shared_info->graphics_memory;
140 		}
141 	}
142 
143 	gInfo->pipe_count = 0;
144 
145 	// Allocate all of our pipes
146 	for (int i = 0; i < MAX_PIPES; i++) {
147 		switch (i) {
148 			case 0:
149 				gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_A);
150 				break;
151 			case 1:
152 				gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_B);
153 				break;
154 			default:
155 				ERROR("%s: Unknown pipe %d\n", __func__, i);
156 		}
157 		if (gInfo->pipes[i] == NULL)
158 			ERROR("%s: Error allocating pipe %d\n", __func__, i);
159 		else
160 			gInfo->pipe_count++;
161 	}
162 
163 	return B_OK;
164 }
165 
166 
167 /*! Clean up data common to both primary and cloned accelerant */
168 static void
169 uninit_common(void)
170 {
171 	intel_free_memory(gInfo->context_base);
172 
173 	delete_area(gInfo->regs_area);
174 	delete_area(gInfo->shared_info_area);
175 
176 	gInfo->regs_area = gInfo->shared_info_area = -1;
177 
178 	// close the file handle ONLY if we're the clone
179 	if (gInfo->is_clone)
180 		close(gInfo->device);
181 
182 	free(gInfo);
183 }
184 
185 
186 static void
187 dump_ports()
188 {
189 	if (gInfo->port_count == 0) {
190 		TRACE("%s: No ports connected\n", __func__);
191 		return;
192 	}
193 
194 	TRACE("%s: Connected ports: (port_count: %" B_PRIu32 ")\n", __func__,
195 		gInfo->port_count);
196 
197 	for (uint32 i = 0; i < gInfo->port_count; i++) {
198 		Port* port = gInfo->ports[i];
199 		if (!port) {
200 			TRACE("port %" B_PRIu32 ":: INVALID ALLOC!\n", i);
201 			continue;
202 		}
203 		TRACE("port %" B_PRIu32 ": %s %s\n", i, port->PortName(),
204 			port->IsConnected() ? "connected" : "disconnected");
205 	}
206 }
207 
208 
209 static bool
210 has_connected_port(port_index portIndex, uint32 type)
211 {
212 	for (uint32 i = 0; i < gInfo->port_count; i++) {
213 		Port* port = gInfo->ports[i];
214 		if (type != INTEL_PORT_TYPE_ANY && port->Type() != type)
215 			continue;
216 		if (portIndex != INTEL_PORT_ANY && port->PortIndex() != portIndex)
217 			continue;
218 
219 		return true;
220 	}
221 
222 	return false;
223 }
224 
225 
226 static status_t
227 probe_ports()
228 {
229 	// Try to determine what ports to use. We use the following heuristic:
230 	// * Check for DisplayPort, these can be more or less detected reliably.
231 	// * Check for HDMI, it'll fail on devices not having HDMI for us to fall
232 	//   back to DVI.
233 	// * Assume DVI B if no HDMI and no DisplayPort is present, confirmed by
234 	//   reading EDID in the IsConnected() call.
235 	// * Check for analog if possible (there's a detection bit on PCH),
236 	//   otherwise the assumed presence is confirmed by reading EDID in
237 	//   IsConnected().
238 
239 	TRACE("adpa: %08" B_PRIx32 "\n", read32(INTEL_ANALOG_PORT));
240 	TRACE("dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32
241 		", dovc: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_PORT_A),
242 		read32(INTEL_DIGITAL_PORT_B), read32(INTEL_DIGITAL_PORT_C));
243 	TRACE("lvds: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_LVDS_PORT));
244 
245 	TRACE("dp_a: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_A));
246 	TRACE("dp_b: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_B));
247 	TRACE("dp_c: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_C));
248 	TRACE("dp_d: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_D));
249 	TRACE("tra_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_A_DP_CTL));
250 	TRACE("trb_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_B_DP_CTL));
251 	TRACE("trc_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_C_DP_CTL));
252 
253 	bool foundLVDS = false;
254 	bool foundDP = false;
255 	bool foundDDI = false;
256 
257 	gInfo->port_count = 0;
258 #if 0
259 	// make sure I2C hardware controller is off (we use bit-banging)
260 	if (gInfo->shared_info->device_type.Generation() >= 5) {
261 		write32(INTEL_DSPCLK_GATE_D,
262 			read32(INTEL_DSPCLK_GATE_D) | PCH_GMBUSUNIT_CLK_GATE_DIS);
263 		read32(INTEL_DSPCLK_GATE_D);
264 
265 		write32(INTEL_GEN9_CLKGATE_DIS_4,
266 			read32(INTEL_GEN9_CLKGATE_DIS_4) | BXT_GMBUSUNIT_CLK_GATE_DIS);
267 		read32(INTEL_GEN9_CLKGATE_DIS_4);
268 
269 		write32(INTEL_GMBUS0, 0); //reset, idle
270 		write32(INTEL_GMBUS4, 0); //block interrupts
271 	}
272 #endif
273 
274 	// Display Port
275 	if (!gInfo->shared_info->device_type.HasDDI()) {
276 		for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) {
277 			TRACE("Probing DisplayPort %d\n", i);
278 			Port* displayPort = new(std::nothrow) DisplayPort((port_index)i);
279 			if (displayPort == NULL)
280 				return B_NO_MEMORY;
281 
282 			if (displayPort->IsConnected()) {
283 				foundDP = true;
284 				gInfo->ports[gInfo->port_count++] = displayPort;
285 			} else
286 				delete displayPort;
287 		}
288 	}
289 
290 	// Digital Display Interface (for DP, HDMI, DVI and eDP)
291 	if (gInfo->shared_info->device_type.HasDDI()) {
292 		for (int i = INTEL_PORT_B; i <= INTEL_PORT_F; i++) {
293 			TRACE("Probing DDI %d\n", i);
294 
295 			Port* ddiPort
296 				= new(std::nothrow) DigitalDisplayInterface((port_index)i);
297 
298 			if (ddiPort == NULL)
299 				return B_NO_MEMORY;
300 
301 			if (ddiPort->IsConnected()) {
302 				foundDDI = true;
303 				gInfo->ports[gInfo->port_count++] = ddiPort;
304 			} else
305 				delete ddiPort;
306 		}
307 	}
308 
309 	if (!gInfo->shared_info->device_type.HasDDI()) {
310 		// Ensure DP_A isn't already taken
311 		TRACE("Probing eDP\n");
312 		if (!has_connected_port((port_index)INTEL_PORT_A, INTEL_PORT_TYPE_ANY)) {
313 			// also always try eDP, it'll also just fail if not applicable
314 			Port* eDPPort = new(std::nothrow) EmbeddedDisplayPort();
315 			if (eDPPort == NULL)
316 				return B_NO_MEMORY;
317 			if (eDPPort->IsConnected())
318 				gInfo->ports[gInfo->port_count++] = eDPPort;
319 			else
320 				delete eDPPort;
321 		}
322 	}
323 
324 	if (!gInfo->shared_info->device_type.HasDDI()) {
325 		for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) {
326 			TRACE("Probing HDMI %d\n", i);
327 			if (has_connected_port((port_index)i, INTEL_PORT_TYPE_ANY)) {
328 				// Ensure port not already claimed by something like DDI
329 				TRACE("Port already claimed\n");
330 				continue;
331 			}
332 
333 			Port* hdmiPort = new(std::nothrow) HDMIPort((port_index)i);
334 			if (hdmiPort == NULL)
335 				return B_NO_MEMORY;
336 
337 			if (hdmiPort->IsConnected())
338 				gInfo->ports[gInfo->port_count++] = hdmiPort;
339 			else
340 				delete hdmiPort;
341 		}
342 	}
343 
344 	// always try the LVDS port when chipset supports it, it'll simply fail if not applicable
345 	if (!gInfo->shared_info->device_type.HasDDI()) {
346 		TRACE("Probing LVDS\n");
347 		Port* lvdsPort = new(std::nothrow) LVDSPort();
348 		if (lvdsPort == NULL)
349 			return B_NO_MEMORY;
350 		if (lvdsPort->IsConnected()) {
351 			foundLVDS = true;
352 			gInfo->ports[gInfo->port_count++] = lvdsPort;
353 			gInfo->head_mode |= HEAD_MODE_LVDS_PANEL;
354 			gInfo->head_mode |= HEAD_MODE_B_DIGITAL;
355 		} else
356 			delete lvdsPort;
357 	}
358 
359 	if (!gInfo->shared_info->device_type.HasDDI()) {
360 		if (!has_connected_port(INTEL_PORT_ANY, INTEL_PORT_TYPE_ANY)) {
361 			TRACE("Probing DVI\n");
362 			// there's neither DisplayPort nor HDMI so far, assume DVI B
363 			for (port_index index = INTEL_PORT_B; index <= INTEL_PORT_C;
364 					index = (port_index)(index + 1)) {
365 				Port* dviPort = new(std::nothrow) DigitalPort(index, "DVI");
366 				if (dviPort == NULL)
367 					return B_NO_MEMORY;
368 
369 				if (dviPort->IsConnected()) {
370 					gInfo->ports[gInfo->port_count++] = dviPort;
371 					gInfo->head_mode |= HEAD_MODE_B_DIGITAL;
372 				} else
373 					delete dviPort;
374 			}
375 		}
376 	}
377 
378 	// then finally always try the analog port when chipsets supports it
379 	if (gInfo->shared_info->device_type.Generation() <= 8) {
380 		TRACE("Probing Analog\n");
381 		Port* analogPort = new(std::nothrow) AnalogPort();
382 		if (analogPort == NULL)
383 			return B_NO_MEMORY;
384 		if (analogPort->IsConnected()) {
385 			gInfo->ports[gInfo->port_count++] = analogPort;
386 			gInfo->head_mode |= HEAD_MODE_A_ANALOG;
387 		} else
388 			delete analogPort;
389 	}
390 
391 	if (gInfo->port_count == 0)
392 		return B_ERROR;
393 
394 	// Activate reference clocks if needed
395 	if (gInfo->shared_info->pch_info == INTEL_PCH_IBX
396 		|| gInfo->shared_info->pch_info == INTEL_PCH_CPT) {
397 		TRACE("Activating clocks\n");
398 		refclk_activate_ilk(foundLVDS || foundDP || foundDDI);
399 	}
400 	/*
401 	} else if (gInfo->shared_info->pch_info == INTEL_PCH_LPT) {
402 		// TODO: Some kind of stepped bend thing?
403 		// only needed for vga
404 		refclk_activate_lpt(foundLVDS);
405 	}
406 	*/
407 
408 	TRACE("Probing complete.\n");
409 	return B_OK;
410 }
411 
412 
413 static status_t
414 assign_pipes()
415 {
416 	// TODO: At some point we should "group" ports to pipes with the same mode.
417 	// You can drive multiple ports from a single pipe as long as the mode is
418 	// the same. For the moment we could get displays with the wrong pipes
419 	// assigned when the count is > 1;
420 
421 	uint32 current = 0;
422 
423 	bool assigned[gInfo->pipe_count];
424 	memset(assigned, 0, gInfo->pipe_count);
425 
426 	// Some ports need to be assigned to a fixed pipe on old hardware (or due
427 	// to limitations in the current driver on current hardware). Assign those
428 	// first
429 	for (uint32 i = 0; i < gInfo->port_count; i++) {
430 		if (!gInfo->ports[i]->IsConnected())
431 			continue;
432 
433 		pipe_index preference = gInfo->ports[i]->PipePreference();
434 		if (preference != INTEL_PIPE_ANY) {
435 			int index = (int)preference - 1;
436 			if (assigned[index]) {
437 				TRACE("Pipe %d is already assigned, it will drive multiple "
438 					"displays\n", index);
439 			}
440 			gInfo->ports[i]->SetPipe(gInfo->pipes[index]);
441 			assigned[index] = true;
442 			continue;
443 		}
444 	}
445 
446 	// In a second pass, assign the remaining ports to the remaining pipes
447 	for (uint32 i = 0; i < gInfo->port_count; i++) {
448 		if (gInfo->ports[i]->IsConnected() && gInfo->ports[i]->GetPipe() == NULL) {
449 			while (current < gInfo->pipe_count && assigned[current])
450 				current++;
451 
452 			if (current >= gInfo->pipe_count) {
453 				ERROR("%s: No pipes left to assign to port %s!\n", __func__,
454 					gInfo->ports[i]->PortName());
455 				continue;
456 			}
457 
458 			gInfo->ports[i]->SetPipe(gInfo->pipes[current]);
459 			assigned[current] = true;
460 		}
461 	}
462 
463 	return B_OK;
464 }
465 
466 
467 //	#pragma mark - public accelerant functions
468 
469 
470 /*! Init primary accelerant */
471 status_t
472 intel_init_accelerant(int device)
473 {
474 	CALLED();
475 
476 	status_t status = init_common(device, false);
477 	if (status != B_OK)
478 		return status;
479 
480 	intel_shared_info &info = *gInfo->shared_info;
481 
482 	init_lock(&info.accelerant_lock, "intel extreme accelerant");
483 	init_lock(&info.engine_lock, "intel extreme engine");
484 
485 	setup_ring_buffer(info.primary_ring_buffer, "intel primary ring buffer");
486 
487 	// Probe all ports
488 	status = probe_ports();
489 
490 	// On TRACE, dump ports and states
491 	dump_ports();
492 
493 	if (status != B_OK)
494 		ERROR("Warning: zero active displays were found!\n");
495 
496 	status = assign_pipes();
497 
498 	if (status != B_OK)
499 		ERROR("Warning: error while assigning pipes!\n");
500 
501 	status = create_mode_list();
502 	if (status != B_OK) {
503 		uninit_common();
504 		return status;
505 	}
506 
507 	return B_OK;
508 }
509 
510 
511 ssize_t
512 intel_accelerant_clone_info_size(void)
513 {
514 	CALLED();
515 	// clone info is device name, so return its maximum size
516 	return B_PATH_NAME_LENGTH;
517 }
518 
519 
520 void
521 intel_get_accelerant_clone_info(void* info)
522 {
523 	CALLED();
524 	ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH);
525 }
526 
527 
528 status_t
529 intel_clone_accelerant(void* info)
530 {
531 	CALLED();
532 
533 	// create full device name
534 	char path[B_PATH_NAME_LENGTH];
535 	strcpy(path, "/dev/");
536 #ifdef __HAIKU__
537 	strlcat(path, (const char*)info, sizeof(path));
538 #else
539 	strcat(path, (const char*)info);
540 #endif
541 
542 	int fd = open(path, B_READ_WRITE);
543 	if (fd < 0)
544 		return errno;
545 
546 	status_t status = init_common(fd, true);
547 	if (status != B_OK)
548 		goto err1;
549 
550 	// get read-only clone of supported display modes
551 	status = gInfo->mode_list_area = clone_area(
552 		"intel extreme cloned modes", (void**)&gInfo->mode_list,
553 		B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area);
554 	if (status < B_OK)
555 		goto err2;
556 
557 	return B_OK;
558 
559 err2:
560 	uninit_common();
561 err1:
562 	close(fd);
563 	return status;
564 }
565 
566 
567 /*! This function is called for both, the primary accelerant and all of
568 	its clones.
569 */
570 void
571 intel_uninit_accelerant(void)
572 {
573 	CALLED();
574 
575 	// delete accelerant instance data
576 	delete_area(gInfo->mode_list_area);
577 	gInfo->mode_list = NULL;
578 
579 	if (!gInfo->is_clone) {
580 		intel_shared_info &info = *gInfo->shared_info;
581 		uninit_lock(&info.accelerant_lock);
582 		uninit_lock(&info.engine_lock);
583 		uninit_ring_buffer(info.primary_ring_buffer);
584 	}
585 	uninit_common();
586 }
587 
588 
589 status_t
590 intel_get_accelerant_device_info(accelerant_device_info* info)
591 {
592 	CALLED();
593 
594 	info->version = B_ACCELERANT_VERSION;
595 
596 	DeviceType* type = &gInfo->shared_info->device_type;
597 
598 	if (type->InFamily(INTEL_FAMILY_8xx))
599 		strcpy(info->name, "Intel Extreme");
600 	else if (type->InFamily(INTEL_FAMILY_9xx))
601 		strcpy(info->name, "Intel GMA");
602 	else if (type->InFamily(INTEL_FAMILY_SOC0))
603 		strcpy(info->name, "Intel Atom");
604 	else if (type->InFamily(INTEL_FAMILY_SER5))
605 		strcpy(info->name, "Intel HD/Iris");
606 	else
607 		strcpy(info->name, "Intel");
608 
609 	strcpy(info->chipset, gInfo->shared_info->device_identifier);
610 	strcpy(info->serial_no, "None");
611 
612 	info->memory = gInfo->shared_info->graphics_memory_size;
613 	info->dac_speed = gInfo->shared_info->pll_info.max_frequency;
614 
615 	return B_OK;
616 }
617 
618 
619 sem_id
620 intel_accelerant_retrace_semaphore()
621 {
622 	CALLED();
623 	return gInfo->shared_info->vblank_sem;
624 }
625