1 /* 2 * Copyright 2006-2016, Haiku, Inc. All Rights Reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Axel Dörfler, axeld@pinc-software.de 7 */ 8 9 10 #include "accelerant_protos.h" 11 #include "accelerant.h" 12 13 #include "utility.h" 14 15 #include <Debug.h> 16 #include <errno.h> 17 #include <stdlib.h> 18 #include <string.h> 19 #include <unistd.h> 20 #include <syslog.h> 21 22 #include <new> 23 24 #include <AGP.h> 25 #include <AutoDeleterOS.h> 26 27 28 #undef TRACE 29 #define TRACE_ACCELERANT 30 #ifdef TRACE_ACCELERANT 31 # define TRACE(x...) _sPrintf("intel_extreme: " x) 32 #else 33 # define TRACE(x...) 34 #endif 35 36 #define ERROR(x...) _sPrintf("intel_extreme: " x) 37 #define CALLED(x...) TRACE("CALLED %s\n", __PRETTY_FUNCTION__) 38 39 40 struct accelerant_info* gInfo; 41 uint32 gDumpCount; 42 43 44 // #pragma mark - 45 46 47 // intel_reg --mmio=ie-0001.bin --devid=27a2 dump 48 void 49 dump_registers() 50 { 51 char filename[255]; 52 53 sprintf(filename, "/boot/system/cache/tmp/ie-%04" B_PRId32 ".bin", 54 gDumpCount); 55 56 ERROR("%s: Taking register dump #%" B_PRId32 "\n", __func__, gDumpCount); 57 58 int fd = open(filename, O_CREAT | O_WRONLY, 0644); 59 uint32 data = 0; 60 if (fd >= 0) { 61 for (int32 i = 0; i < 0x80000; i += sizeof(data)) { 62 //char line[512]; 63 //int length = sprintf(line, "%05" B_PRIx32 ": " 64 // "%08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 " %08" B_PRIx32 "\n", 65 // i, read32(i), read32(i + 4), read32(i + 8), read32(i + 12)); 66 data = read32(i); 67 write(fd, &data, sizeof(data)); 68 } 69 close(fd); 70 sync(); 71 } 72 73 gDumpCount++; 74 } 75 76 77 /*! This is the common accelerant_info initializer. It is called by 78 both, the first accelerant and all clones. 79 */ 80 static status_t 81 init_common(int device, bool isClone) 82 { 83 // initialize global accelerant info structure 84 85 // Number of register dumps we have... taken. 86 gDumpCount = 0; 87 88 gInfo = (accelerant_info*)malloc(sizeof(accelerant_info)); 89 if (gInfo == NULL) 90 return B_NO_MEMORY; 91 MemoryDeleter infoDeleter(gInfo); 92 93 memset(gInfo, 0, sizeof(accelerant_info)); 94 95 gInfo->is_clone = isClone; 96 gInfo->device = device; 97 98 // get basic info from driver 99 100 intel_get_private_data data; 101 data.magic = INTEL_PRIVATE_DATA_MAGIC; 102 103 if (ioctl(device, INTEL_GET_PRIVATE_DATA, &data, 104 sizeof(intel_get_private_data)) != 0) 105 return B_ERROR; 106 107 AreaDeleter sharedDeleter(clone_area("intel extreme shared info", 108 (void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 109 data.shared_info_area)); 110 status_t status = gInfo->shared_info_area = sharedDeleter.Get(); 111 if (status < B_OK) 112 return status; 113 114 AreaDeleter regsDeleter(clone_area("intel extreme regs", 115 (void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA, 116 gInfo->shared_info->registers_area)); 117 status = gInfo->regs_area = regsDeleter.Get(); 118 if (status < B_OK) 119 return status; 120 121 infoDeleter.Detach(); 122 sharedDeleter.Detach(); 123 regsDeleter.Detach(); 124 125 // The overlay registers, hardware status, and cursor memory share 126 // a single area with the shared_info 127 128 if (gInfo->shared_info->overlay_offset != 0) { 129 gInfo->overlay_registers = (struct overlay_registers*) 130 (gInfo->shared_info->graphics_memory 131 + gInfo->shared_info->overlay_offset); 132 } 133 134 if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_96x)) { 135 // allocate some extra memory for the 3D context 136 if (intel_allocate_memory(INTEL_i965_3D_CONTEXT_SIZE, 137 B_APERTURE_NON_RESERVED, gInfo->context_base) == B_OK) { 138 gInfo->context_offset = gInfo->context_base 139 - (addr_t)gInfo->shared_info->graphics_memory; 140 } 141 } 142 143 gInfo->pipe_count = 0; 144 145 // Allocate all of our pipes 146 for (int i = 0; i < MAX_PIPES; i++) { 147 switch (i) { 148 case 0: 149 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_A); 150 break; 151 case 1: 152 gInfo->pipes[i] = new(std::nothrow) Pipe(INTEL_PIPE_B); 153 break; 154 default: 155 ERROR("%s: Unknown pipe %d\n", __func__, i); 156 } 157 if (gInfo->pipes[i] == NULL) 158 ERROR("%s: Error allocating pipe %d\n", __func__, i); 159 else 160 gInfo->pipe_count++; 161 } 162 163 return B_OK; 164 } 165 166 167 /*! Clean up data common to both primary and cloned accelerant */ 168 static void 169 uninit_common(void) 170 { 171 intel_free_memory(gInfo->context_base); 172 173 delete_area(gInfo->regs_area); 174 delete_area(gInfo->shared_info_area); 175 176 gInfo->regs_area = gInfo->shared_info_area = -1; 177 178 // close the file handle ONLY if we're the clone 179 if (gInfo->is_clone) 180 close(gInfo->device); 181 182 free(gInfo); 183 } 184 185 186 static void 187 dump_ports() 188 { 189 if (gInfo->port_count == 0) { 190 TRACE("%s: No ports connected\n", __func__); 191 return; 192 } 193 194 TRACE("%s: Connected ports: (port_count: %" B_PRIu32 ")\n", __func__, 195 gInfo->port_count); 196 197 for (uint32 i = 0; i < gInfo->port_count; i++) { 198 Port* port = gInfo->ports[i]; 199 if (!port) { 200 TRACE("port %" B_PRIu32 ":: INVALID ALLOC!\n", i); 201 continue; 202 } 203 TRACE("port %" B_PRIu32 ": %s %s\n", i, port->PortName(), 204 port->IsConnected() ? "connected" : "disconnected"); 205 } 206 } 207 208 209 static bool 210 has_connected_port(port_index portIndex, uint32 type) 211 { 212 for (uint32 i = 0; i < gInfo->port_count; i++) { 213 Port* port = gInfo->ports[i]; 214 if (type != INTEL_PORT_TYPE_ANY && port->Type() != type) 215 continue; 216 if (portIndex != INTEL_PORT_ANY && port->PortIndex() != portIndex) 217 continue; 218 219 return true; 220 } 221 222 return false; 223 } 224 225 226 static status_t 227 probe_ports() 228 { 229 // Try to determine what ports to use. We use the following heuristic: 230 // * Check for DisplayPort, these can be more or less detected reliably. 231 // * Check for HDMI, it'll fail on devices not having HDMI for us to fall 232 // back to DVI. 233 // * Assume DVI B if no HDMI and no DisplayPort is present, confirmed by 234 // reading EDID in the IsConnected() call. 235 // * Check for analog if possible (there's a detection bit on PCH), 236 // otherwise the assumed presence is confirmed by reading EDID in 237 // IsConnected(). 238 239 TRACE("adpa: %08" B_PRIx32 "\n", read32(INTEL_ANALOG_PORT)); 240 TRACE("dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32 241 ", dovc: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_PORT_A), 242 read32(INTEL_DIGITAL_PORT_B), read32(INTEL_DIGITAL_PORT_C)); 243 TRACE("lvds: %08" B_PRIx32 "\n", read32(INTEL_DIGITAL_LVDS_PORT)); 244 245 TRACE("dp_a: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_A)); 246 TRACE("dp_b: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_B)); 247 TRACE("dp_c: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_C)); 248 TRACE("dp_d: %08" B_PRIx32 "\n", read32(INTEL_DISPLAY_PORT_D)); 249 TRACE("tra_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_A_DP_CTL)); 250 TRACE("trb_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_B_DP_CTL)); 251 TRACE("trc_dp: %08" B_PRIx32 "\n", read32(INTEL_TRANSCODER_C_DP_CTL)); 252 253 bool foundLVDS = false; 254 bool foundDP = false; 255 bool foundDDI = false; 256 257 gInfo->port_count = 0; 258 #if 0 259 // make sure I2C hardware controller is off (we use bit-banging) 260 if (gInfo->shared_info->device_type.Generation() >= 5) { 261 write32(INTEL_DSPCLK_GATE_D, 262 read32(INTEL_DSPCLK_GATE_D) | PCH_GMBUSUNIT_CLK_GATE_DIS); 263 read32(INTEL_DSPCLK_GATE_D); 264 265 write32(INTEL_GEN9_CLKGATE_DIS_4, 266 read32(INTEL_GEN9_CLKGATE_DIS_4) | BXT_GMBUSUNIT_CLK_GATE_DIS); 267 read32(INTEL_GEN9_CLKGATE_DIS_4); 268 269 write32(INTEL_GMBUS0, 0); //reset, idle 270 write32(INTEL_GMBUS4, 0); //block interrupts 271 } 272 #endif 273 274 // Display Port 275 if (!gInfo->shared_info->device_type.HasDDI()) { 276 for (int i = INTEL_PORT_A; i <= INTEL_PORT_D; i++) { 277 TRACE("Probing DisplayPort %d\n", i); 278 Port* displayPort = new(std::nothrow) DisplayPort((port_index)i); 279 if (displayPort == NULL) 280 return B_NO_MEMORY; 281 282 if (displayPort->IsConnected()) { 283 foundDP = true; 284 gInfo->ports[gInfo->port_count++] = displayPort; 285 } else 286 delete displayPort; 287 } 288 } 289 290 // Digital Display Interface (for DP, HDMI and DVI) 291 if (gInfo->shared_info->device_type.HasDDI()) { 292 for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) { 293 TRACE("Probing DDI %d\n", i); 294 295 Port* ddiPort 296 = new(std::nothrow) DigitalDisplayInterface((port_index)i); 297 298 if (ddiPort == NULL) 299 return B_NO_MEMORY; 300 301 if (ddiPort->IsConnected()) { 302 foundDDI = true; 303 gInfo->ports[gInfo->port_count++] = ddiPort; 304 } else 305 delete ddiPort; 306 } 307 } 308 309 // Ensure DP_A isn't already taken (or DDI) 310 // Please note that Skylake and up use eDP for a seperate active VGA converter chip. 311 TRACE("Probing eDP\n"); 312 if (!has_connected_port((port_index)INTEL_PORT_A, INTEL_PORT_TYPE_ANY)) { 313 // also always try eDP, it'll also just fail if not applicable 314 Port* eDPPort = new(std::nothrow) EmbeddedDisplayPort(); 315 if (eDPPort == NULL) 316 return B_NO_MEMORY; 317 if (eDPPort->IsConnected()) 318 gInfo->ports[gInfo->port_count++] = eDPPort; 319 else 320 delete eDPPort; 321 } 322 323 if (!gInfo->shared_info->device_type.HasDDI()) { 324 for (int i = INTEL_PORT_B; i <= INTEL_PORT_D; i++) { 325 TRACE("Probing HDMI %d\n", i); 326 if (has_connected_port((port_index)i, INTEL_PORT_TYPE_ANY)) { 327 // Ensure port not already claimed by something like DDI 328 TRACE("Port already claimed\n"); 329 continue; 330 } 331 332 Port* hdmiPort = new(std::nothrow) HDMIPort((port_index)i); 333 if (hdmiPort == NULL) 334 return B_NO_MEMORY; 335 336 if (hdmiPort->IsConnected()) 337 gInfo->ports[gInfo->port_count++] = hdmiPort; 338 else 339 delete hdmiPort; 340 } 341 } 342 343 // always try the LVDS port when chipset supports it, it'll simply fail if not applicable 344 if (!gInfo->shared_info->device_type.HasDDI()) { 345 TRACE("Probing LVDS\n"); 346 Port* lvdsPort = new(std::nothrow) LVDSPort(); 347 if (lvdsPort == NULL) 348 return B_NO_MEMORY; 349 if (lvdsPort->IsConnected()) { 350 foundLVDS = true; 351 gInfo->ports[gInfo->port_count++] = lvdsPort; 352 gInfo->head_mode |= HEAD_MODE_LVDS_PANEL; 353 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 354 } else 355 delete lvdsPort; 356 } 357 358 if (!gInfo->shared_info->device_type.HasDDI()) { 359 if (!has_connected_port(INTEL_PORT_ANY, INTEL_PORT_TYPE_ANY)) { 360 TRACE("Probing DVI\n"); 361 // there's neither DisplayPort nor HDMI so far, assume DVI B 362 for (port_index index = INTEL_PORT_B; index <= INTEL_PORT_C; 363 index = (port_index)(index + 1)) { 364 Port* dviPort = new(std::nothrow) DigitalPort(index, "DVI"); 365 if (dviPort == NULL) 366 return B_NO_MEMORY; 367 368 if (dviPort->IsConnected()) { 369 gInfo->ports[gInfo->port_count++] = dviPort; 370 gInfo->head_mode |= HEAD_MODE_B_DIGITAL; 371 } else 372 delete dviPort; 373 } 374 } 375 } 376 377 // then finally always try the analog port when chipsets supports it 378 if (gInfo->shared_info->device_type.Generation() <= 8) { 379 TRACE("Probing Analog\n"); 380 Port* analogPort = new(std::nothrow) AnalogPort(); 381 if (analogPort == NULL) 382 return B_NO_MEMORY; 383 if (analogPort->IsConnected()) { 384 gInfo->ports[gInfo->port_count++] = analogPort; 385 gInfo->head_mode |= HEAD_MODE_A_ANALOG; 386 } else 387 delete analogPort; 388 } 389 390 if (gInfo->port_count == 0) 391 return B_ERROR; 392 393 // Activate reference clocks if needed 394 if (gInfo->shared_info->pch_info == INTEL_PCH_IBX 395 || gInfo->shared_info->pch_info == INTEL_PCH_CPT) { 396 TRACE("Activating clocks\n"); 397 refclk_activate_ilk(foundLVDS || foundDP || foundDDI); 398 } 399 /* 400 } else if (gInfo->shared_info->pch_info == INTEL_PCH_LPT) { 401 // TODO: Some kind of stepped bend thing? 402 // only needed for vga 403 refclk_activate_lpt(foundLVDS); 404 } 405 */ 406 407 TRACE("Probing complete.\n"); 408 return B_OK; 409 } 410 411 412 static status_t 413 assign_pipes() 414 { 415 // TODO: At some point we should "group" ports to pipes with the same mode. 416 // You can drive multiple ports from a single pipe as long as the mode is 417 // the same. For the moment we could get displays with the wrong pipes 418 // assigned when the count is > 1; 419 420 uint32 current = 0; 421 422 bool assigned[gInfo->pipe_count]; 423 memset(assigned, 0, gInfo->pipe_count); 424 425 // Some ports need to be assigned to a fixed pipe on old hardware (or due 426 // to limitations in the current driver on current hardware). Assign those 427 // first 428 for (uint32 i = 0; i < gInfo->port_count; i++) { 429 if (!gInfo->ports[i]->IsConnected()) 430 continue; 431 432 pipe_index preference = gInfo->ports[i]->PipePreference(); 433 if (preference != INTEL_PIPE_ANY) { 434 int index = (preference == INTEL_PIPE_B) ? 1 : 0; 435 if (assigned[index]) { 436 TRACE("Pipe %d is already assigned, it will drive multiple " 437 "displays\n", index); 438 } 439 gInfo->ports[i]->SetPipe(gInfo->pipes[index]); 440 assigned[index] = true; 441 continue; 442 } 443 } 444 445 // In a second pass, assign the remaining ports to the remaining pipes 446 for (uint32 i = 0; i < gInfo->port_count; i++) { 447 if (gInfo->ports[i]->IsConnected() && gInfo->ports[i]->GetPipe() == NULL) { 448 while (current < gInfo->pipe_count && assigned[current]) 449 current++; 450 451 if (current >= gInfo->pipe_count) { 452 ERROR("%s: No pipes left to assign to port %s!\n", __func__, 453 gInfo->ports[i]->PortName()); 454 continue; 455 } 456 457 gInfo->ports[i]->SetPipe(gInfo->pipes[current]); 458 assigned[current] = true; 459 } 460 } 461 462 return B_OK; 463 } 464 465 466 // #pragma mark - public accelerant functions 467 468 469 /*! Init primary accelerant */ 470 status_t 471 intel_init_accelerant(int device) 472 { 473 CALLED(); 474 475 status_t status = init_common(device, false); 476 if (status != B_OK) 477 return status; 478 479 intel_shared_info &info = *gInfo->shared_info; 480 481 init_lock(&info.accelerant_lock, "intel extreme accelerant"); 482 init_lock(&info.engine_lock, "intel extreme engine"); 483 484 setup_ring_buffer(info.primary_ring_buffer, "intel primary ring buffer"); 485 486 // Probe all ports 487 status = probe_ports(); 488 489 // On TRACE, dump ports and states 490 dump_ports(); 491 492 if (status != B_OK) 493 ERROR("Warning: zero active displays were found!\n"); 494 495 status = assign_pipes(); 496 497 if (status != B_OK) 498 ERROR("Warning: error while assigning pipes!\n"); 499 500 status = create_mode_list(); 501 if (status != B_OK) { 502 uninit_common(); 503 return status; 504 } 505 506 return B_OK; 507 } 508 509 510 ssize_t 511 intel_accelerant_clone_info_size(void) 512 { 513 CALLED(); 514 // clone info is device name, so return its maximum size 515 return B_PATH_NAME_LENGTH; 516 } 517 518 519 void 520 intel_get_accelerant_clone_info(void* info) 521 { 522 CALLED(); 523 ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH); 524 } 525 526 527 status_t 528 intel_clone_accelerant(void* info) 529 { 530 CALLED(); 531 532 // create full device name 533 char path[B_PATH_NAME_LENGTH]; 534 strcpy(path, "/dev/"); 535 #ifdef __HAIKU__ 536 strlcat(path, (const char*)info, sizeof(path)); 537 #else 538 strcat(path, (const char*)info); 539 #endif 540 541 int fd = open(path, B_READ_WRITE); 542 if (fd < 0) 543 return errno; 544 545 status_t status = init_common(fd, true); 546 if (status != B_OK) 547 goto err1; 548 549 // get read-only clone of supported display modes 550 status = gInfo->mode_list_area = clone_area( 551 "intel extreme cloned modes", (void**)&gInfo->mode_list, 552 B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area); 553 if (status < B_OK) 554 goto err2; 555 556 return B_OK; 557 558 err2: 559 uninit_common(); 560 err1: 561 close(fd); 562 return status; 563 } 564 565 566 /*! This function is called for both, the primary accelerant and all of 567 its clones. 568 */ 569 void 570 intel_uninit_accelerant(void) 571 { 572 CALLED(); 573 574 // delete accelerant instance data 575 delete_area(gInfo->mode_list_area); 576 gInfo->mode_list = NULL; 577 578 if (!gInfo->is_clone) { 579 intel_shared_info &info = *gInfo->shared_info; 580 uninit_lock(&info.accelerant_lock); 581 uninit_lock(&info.engine_lock); 582 uninit_ring_buffer(info.primary_ring_buffer); 583 } 584 uninit_common(); 585 } 586 587 588 status_t 589 intel_get_accelerant_device_info(accelerant_device_info* info) 590 { 591 CALLED(); 592 593 info->version = B_ACCELERANT_VERSION; 594 595 DeviceType* type = &gInfo->shared_info->device_type; 596 597 if (type->InFamily(INTEL_FAMILY_8xx)) 598 strcpy(info->name, "Intel Extreme"); 599 else if (type->InFamily(INTEL_FAMILY_9xx)) 600 strcpy(info->name, "Intel GMA"); 601 else if (type->InFamily(INTEL_FAMILY_SOC0)) 602 strcpy(info->name, "Intel Atom"); 603 else if (type->InFamily(INTEL_FAMILY_SER5)) 604 strcpy(info->name, "Intel HD/Iris"); 605 else 606 strcpy(info->name, "Intel"); 607 608 strcpy(info->chipset, gInfo->shared_info->device_identifier); 609 strcpy(info->serial_no, "None"); 610 611 info->memory = gInfo->shared_info->graphics_memory_size; 612 info->dac_speed = gInfo->shared_info->pll_info.max_frequency; 613 614 return B_OK; 615 } 616 617 618 sem_id 619 intel_accelerant_retrace_semaphore() 620 { 621 CALLED(); 622 return gInfo->shared_info->vblank_sem; 623 } 624