xref: /haiku/src/add-ons/accelerants/intel_extreme/Pipes.h (revision fc7456e9b1ec38c941134ed6d01c438cf289381e)
1 /*
2  * Copyright 2011-2015, Haiku, Inc. All Rights Reserved.
3  * Distributed under the terms of the MIT License.
4  *
5  * Authors:
6  *		Michael Lotz, mmlr@mlotz.ch
7  *		Alexander von Gluck IV, kallisti5@unixzen.com
8  */
9 #ifndef INTEL_PIPE_H
10 #define INTEL_PIPE_H
11 
12 
13 #include <edid.h>
14 
15 #include "intel_extreme.h"
16 
17 #include "pll.h"
18 #include "FlexibleDisplayInterface.h"
19 #include "PanelFitter.h"
20 
21 
22 #define MAX_PIPES	4	// not all cards have this much though
23 
24 
25 void program_pipe_color_modes(uint32 colorMode);
26 
27 //class FDILink;
28 //class PanelFitter;
29 
30 class Pipe {
31 public:
32 									Pipe(pipe_index pipeIndex);
33 									~Pipe();
34 
35 		pipe_index					Index()
36 										{ return fPipeIndex; }
37 
38 		bool						IsEnabled();
39 		void						Enable(bool enable);
40 		void						Disable();
41 
42 		void						Configure(display_mode* mode);
43 		status_t					SetFDILink(
44 										const display_timing& timing,
45 										uint32 linkBandwidth,
46 										uint32 lanes,
47 										uint32 bitsPerPixel);
48 		void						ConfigureScalePos(display_mode* mode);
49 		void						ConfigureTimings(display_mode* mode,
50 										bool hardware = true,
51 										port_index portIndex = INTEL_PORT_ANY);
52 		void						ConfigureClocks(
53 										const pll_divisors& divisors,
54 										uint32 pixelClock,
55 										uint32 extraFlags);
56 		void						ConfigureClocksSKL(
57 										const skl_wrpll_params& wrpll_params,
58 										uint32 pixelClock,
59 										port_index pllForPort,
60 										uint32* pllSel);
61 		uint32						TranscoderMode();
62 
63 		// access to the various parts of the pipe
64 		::FDILink*					FDI()
65 										{ return fFDILink; }
66 		::PanelFitter*				PFT()
67 										{ return fPanelFitter; }
68 
69 private:
70 		void						_ConfigureTranscoder(display_mode* mode);
71 
72 		bool						fHasTranscoder;
73 
74 		FDILink*					fFDILink;
75 		PanelFitter*				fPanelFitter;
76 
77 		pipe_index					fPipeIndex;
78 
79 		addr_t						fPipeOffset;
80 		addr_t						fPlaneOffset;
81 };
82 
83 
84 #endif // INTEL_PIPE_H
85