1 #ifndef _KERNEL_ARCH_x86_MSI_H 2 #define _KERNEL_ARCH_x86_MSI_H 3 4 #include <arch/generic/msi.h> 5 6 // address register 7 #define MSI_ADDRESS_BASE 0xfee00000 8 #define MSI_DESTINATION_ID_SHIFT 12 9 #define MSI_REDIRECTION 0x00000008 10 #define MSI_NO_REDIRECTION 0x00000000 11 #define MSI_DESTINATION_MODE_LOGICAL 0x00000004 12 #define MSI_DESTINATION_MODE_PHYSICAL 0x00000000 13 14 // data register 15 #define MSI_TRIGGER_MODE_EDGE 0x00000000 16 #define MSI_TRIGGER_MODE_LEVEL 0x00008000 17 #define MSI_LEVEL_DEASSERT 0x00000000 18 #define MSI_LEVEL_ASSERT 0x00004000 19 #define MSI_DELIVERY_MODE_FIXED 0x00000000 20 #define MSI_DELIVERY_MODE_LOWEST_PRIO 0x00000100 21 #define MSI_DELIVERY_MODE_SMI 0x00000200 22 #define MSI_DELIVERY_MODE_NMI 0x00000400 23 #define MSI_DELIVERY_MODE_INIT 0x00000500 24 #define MSI_DELIVERY_MODE_EXT_INT 0x00000700 25 26 27 void msi_assign_interrupt_to_cpu(uint8 irq, int32 cpu); 28 29 30 #endif // _KERNEL_ARCH_x86_MSI_H 31