1655f3b41SMichael Lotz /* 2655f3b41SMichael Lotz * Copyright 2008, Dustin Howett, dustin.howett@gmail.com. All rights reserved. 3655f3b41SMichael Lotz * Copyright 2005, Axel Dörfler, axeld@pinc-software.de. All rights reserved. 4655f3b41SMichael Lotz * Distributed under the terms of the MIT License. 5655f3b41SMichael Lotz * 6655f3b41SMichael Lotz * Copyright 2001-2002, Travis Geiselbrecht. All rights reserved. 7655f3b41SMichael Lotz * Distributed under the terms of the NewOS License. 8655f3b41SMichael Lotz */ 9655f3b41SMichael Lotz #ifndef _KERNEL_ARCH_x86_APIC_H 10655f3b41SMichael Lotz #define _KERNEL_ARCH_x86_APIC_H 11655f3b41SMichael Lotz 12655f3b41SMichael Lotz #include <boot/kernel_args.h> 13655f3b41SMichael Lotz #include <SupportDefs.h> 14655f3b41SMichael Lotz 15655f3b41SMichael Lotz #define APIC_ENABLE 0x100 16655f3b41SMichael Lotz #define APIC_FOCUS (~(1 << 9)) 17655f3b41SMichael Lotz #define APIC_SIV (0xff) 18655f3b41SMichael Lotz 19655f3b41SMichael Lotz // offsets to APIC register 20655f3b41SMichael Lotz #define APIC_ID 0x020 21655f3b41SMichael Lotz #define APIC_VERSION 0x030 22655f3b41SMichael Lotz #define APIC_TASK_PRIORITY 0x080 23655f3b41SMichael Lotz #define APIC_ARBITRATION_PRIORITY 0x090 24655f3b41SMichael Lotz #define APIC_PROCESSOR_PRIORITY 0x0a0 25655f3b41SMichael Lotz #define APIC_EOI 0x0b0 26655f3b41SMichael Lotz #define APIC_LOGICAL_DEST 0x0d0 27655f3b41SMichael Lotz #define APIC_DEST_FORMAT 0x0e0 28655f3b41SMichael Lotz #define APIC_SPURIOUS_INTR_VECTOR 0x0f0 29655f3b41SMichael Lotz #define APIC_ERROR_STATUS 0x280 30655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1 0x300 // bits 0-31 31655f3b41SMichael Lotz #define APIC_INTR_COMMAND_2 0x310 // bits 32-63 32655f3b41SMichael Lotz #define APIC_LVT_TIMER 0x320 33655f3b41SMichael Lotz #define APIC_LVT_THERMAL_SENSOR 0x330 34655f3b41SMichael Lotz #define APIC_LVT_PERFMON_COUNTERS 0x340 35655f3b41SMichael Lotz #define APIC_LVT_LINT0 0x350 36655f3b41SMichael Lotz #define APIC_LVT_LINT1 0x360 37655f3b41SMichael Lotz #define APIC_LVT_ERROR 0x370 38655f3b41SMichael Lotz #define APIC_INITIAL_TIMER_COUNT 0x380 39655f3b41SMichael Lotz #define APIC_CURRENT_TIMER_COUNT 0x390 40655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG 0x3e0 41655f3b41SMichael Lotz 42655f3b41SMichael Lotz /* standard APIC interrupt defines */ 43655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_FIXED 0 44655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_LOWESTPRI (1 << 8) // ICR1 only 45655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_SMI (2 << 8) 46655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_NMI (4 << 8) 47655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_INIT (5 << 8) 48655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_STARTUP (6 << 8) // ICR1 only 49655f3b41SMichael Lotz #define APIC_DELIVERY_MODE_ExtINT (7 << 8) // LINT0/1 only 50655f3b41SMichael Lotz 51655f3b41SMichael Lotz #define APIC_DELIVERY_STATUS (1 << 12) 52655f3b41SMichael Lotz #define APIC_TRIGGER_MODE_LEVEL (1 << 15) 53655f3b41SMichael Lotz 54655f3b41SMichael Lotz /* Interrupt Command defines */ 55*e3d001ffSPawel Dziepak #define APIC_INTR_COMMAND_1_MASK 0xfff32000 56655f3b41SMichael Lotz #define APIC_INTR_COMMAND_2_MASK 0x00ffffff 57655f3b41SMichael Lotz 58655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_MODE_PHYSICAL 0 59655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_MODE_LOGICAL (1 << 11) 60655f3b41SMichael Lotz 61655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_ASSERT (1 << 14) 62655f3b41SMichael Lotz 63655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_FIELD 0 64655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_SELF (1 << 18) 65655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_ALL (2 << 18) 66655f3b41SMichael Lotz #define APIC_INTR_COMMAND_1_DEST_ALL_BUT_SELF (3 << 18) 67655f3b41SMichael Lotz 68655f3b41SMichael Lotz /* Local Vector Table defines */ 69655f3b41SMichael Lotz #define APIC_LVT_MASKED (1 << 16) 70655f3b41SMichael Lotz 71655f3b41SMichael Lotz // timer defines 72655f3b41SMichael Lotz #define APIC_LVT_TIMER_MASK 0xfffcef00 73655f3b41SMichael Lotz 74655f3b41SMichael Lotz // LINT0/1 defines 75655f3b41SMichael Lotz #define APIC_LVT_LINT_MASK 0xfffe0800 76655f3b41SMichael Lotz #define APIC_LVT_LINT_INPUT_POLARITY (1 << 13) 77655f3b41SMichael Lotz 78655f3b41SMichael Lotz // Timer Divide Config Divisors 79655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_1 0x0b 80655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_2 0x00 81655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_4 0x01 82655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_8 0x02 83655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_16 0x03 84655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_32 0x08 85655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_64 0x09 86655f3b41SMichael Lotz #define APIC_TIMER_DIVIDE_CONFIG_128 0x0a 87655f3b41SMichael Lotz 88655f3b41SMichael Lotz /* 89655f3b41SMichael Lotz #define APIC_LVT_DM 0x00000700 90655f3b41SMichael Lotz #define APIC_LVT_DM_ExtINT 0x00000700 91655f3b41SMichael Lotz #define APIC_LVT_DM_NMI 0x00000400 92655f3b41SMichael Lotz #define APIC_LVT_IIPP 0x00002000 93655f3b41SMichael Lotz #define APIC_LVT_TM 0x00008000 94655f3b41SMichael Lotz #define APIC_LVT_M 0x00010000 95655f3b41SMichael Lotz #define APIC_LVT_OS 0x00020000 96655f3b41SMichael Lotz 97655f3b41SMichael Lotz #define APIC_TPR_PRIO 0x000000ff 98655f3b41SMichael Lotz #define APIC_TPR_INT 0x000000f0 99655f3b41SMichael Lotz #define APIC_TPR_SUB 0x0000000f 100655f3b41SMichael Lotz 101655f3b41SMichael Lotz #define APIC_SVR_SWEN 0x00000100 102655f3b41SMichael Lotz #define APIC_SVR_FOCUS 0x00000200 103655f3b41SMichael Lotz 104655f3b41SMichael Lotz #define IOAPIC_ID 0x0 105655f3b41SMichael Lotz #define IOAPIC_VERSION 0x1 106655f3b41SMichael Lotz #define IOAPIC_ARB 0x2 107655f3b41SMichael Lotz #define IOAPIC_REDIR_TABLE 0x10 108655f3b41SMichael Lotz */ 109655f3b41SMichael Lotz 1103d310bd5SMichael Lotz #if !_BOOT_MODE 1113d310bd5SMichael Lotz 112655f3b41SMichael Lotz bool apic_available(); 113*e3d001ffSPawel Dziepak bool x2apic_available(); 114655f3b41SMichael Lotz uint32 apic_local_id(); 11578777340SJérôme Duval uint32 apic_local_version(); 11678777340SJérôme Duval uint32 apic_task_priority(); 11778777340SJérôme Duval void apic_set_task_priority(uint32 config); 118655f3b41SMichael Lotz void apic_end_of_interrupt(); 119655f3b41SMichael Lotz 120a56cbb2aSMichael Lotz void apic_disable_local_ints(); 121a56cbb2aSMichael Lotz 12278777340SJérôme Duval uint32 apic_spurious_intr_vector(); 12378777340SJérôme Duval void apic_set_spurious_intr_vector(uint32 config); 124*e3d001ffSPawel Dziepak 125*e3d001ffSPawel Dziepak void apic_set_interrupt_command(uint32 destination, uint32 mode); 126*e3d001ffSPawel Dziepak bool apic_interrupt_delivered(void); 12778777340SJérôme Duval 12878777340SJérôme Duval uint32 apic_lvt_timer(); 12978777340SJérôme Duval void apic_set_lvt_timer(uint32 config); 13078777340SJérôme Duval uint32 apic_lvt_error(); 13178777340SJérôme Duval void apic_set_lvt_error(uint32 config); 13278777340SJérôme Duval uint32 apic_lvt_initial_timer_count(); 13378777340SJérôme Duval void apic_set_lvt_initial_timer_count(uint32 config); 13478777340SJérôme Duval uint32 apic_lvt_timer_divide_config(); 13578777340SJérôme Duval void apic_set_lvt_timer_divide_config(uint32 config); 13678777340SJérôme Duval 137655f3b41SMichael Lotz status_t apic_init(kernel_args *args); 138655f3b41SMichael Lotz status_t apic_per_cpu_init(kernel_args *args, int32 cpu); 139655f3b41SMichael Lotz 1403d310bd5SMichael Lotz #endif // !_BOOT_MODE 1413d310bd5SMichael Lotz 142655f3b41SMichael Lotz #endif /* _KERNEL_ARCH_x86_APIC_H */ 143