1 /* 2 * Copyright 2021, Haiku, Inc. All rights reserved 3 * Distributed under the terms of the MIT License. 4 */ 5 #ifndef _ARCH_UART_SIFIVE_H_ 6 #define _ARCH_UART_SIFIVE_H_ 7 8 9 #include <arch/generic/debug_uart.h> 10 11 12 #define UART_KIND_SIFIVE "sifive" 13 14 15 // UARTSifiveRegs.ie, ip 16 enum { 17 kUartSifiveTxwm = 1 << 0, 18 kUartSifiveRxwm = 1 << 1, 19 }; 20 21 22 struct UARTSifiveRegs { 23 union Txdata { 24 struct { 25 uint32 data: 8; 26 uint32 reserved: 23; 27 uint32 isFull: 1; 28 }; 29 uint32 val; 30 } txdata; 31 32 union Rxdata { 33 struct { 34 uint32 data: 8; 35 uint32 reserved: 23; 36 uint32 isEmpty: 1; 37 }; 38 uint32 val; 39 } rxdata; 40 41 union Txctrl { 42 struct { 43 uint32 enable: 1; 44 uint32 nstop: 1; 45 uint32 reserved1: 14; 46 uint32 cnt: 3; 47 uint32 reserved2: 13; 48 }; 49 uint32 val; 50 } txctrl; 51 52 union Rxctrl { 53 struct { 54 uint32 enable: 1; 55 uint32 reserved1: 15; 56 uint32 cnt: 3; 57 uint32 reserved2: 13; 58 }; 59 uint32 val; 60 } rxctrl; 61 62 uint32 ie; // interrupt enable 63 uint32 ip; // interrupt pending 64 uint32 div; 65 uint32 unused; 66 }; 67 68 69 class ArchUARTSifive : public DebugUART { 70 public: 71 ArchUARTSifive(addr_t base, int64 clock); 72 ~ArchUARTSifive(); 73 74 virtual void InitEarly(); 75 virtual void Init(); 76 virtual void InitPort(uint32 baud); 77 78 virtual void Enable(); 79 virtual void Disable(); 80 81 virtual int PutChar(char ch); 82 virtual int GetChar(bool wait); 83 84 virtual void FlushTx(); 85 virtual void FlushRx(); 86 87 protected: 88 virtual void Barrier(); 89 90 inline volatile UARTSifiveRegs* 91 Regs(); 92 }; 93 94 95 volatile UARTSifiveRegs* 96 ArchUARTSifive::Regs() 97 { 98 return (volatile UARTSifiveRegs*)Base(); 99 } 100 101 102 ArchUARTSifive* arch_get_uart_sifive(addr_t base, int64 clock); 103 104 105 #endif // _ARCH_UART_SIFIVE_H_ 106