1 /* 2 * Copyright 2003-2004, Axel Dörfler, axeld@pinc-software.de. 3 * Copyright 2019, Adrien Destugues, pulkomandy@pulkomandy.tk. 4 * Distributed under the terms of the MIT License. 5 */ 6 #ifndef _KERNEL_ARCH_RISCV64_CPU_H 7 #define _KERNEL_ARCH_RISCV64_CPU_H 8 9 10 #include <arch/riscv64/arch_thread_types.h> 11 #include <arch_cpu_defs.h> 12 #include <kernel.h> 13 14 15 #define CPU_MAX_CACHE_LEVEL 8 16 #define CACHE_LINE_SIZE 64 17 18 19 static inline bool 20 get_ac() 21 { 22 SstatusReg status(Sstatus()); 23 return status.sum != 0; 24 } 25 26 27 static inline void 28 set_ac() 29 { 30 // TODO: Could be done atomically via CSRRS? 31 SstatusReg status(Sstatus()); 32 status.sum = 1; 33 SetSstatus(status.val); 34 } 35 36 37 static inline void 38 clear_ac() 39 { 40 // TODO: Could be done atomically with CSRRC? 41 SstatusReg status(Sstatus()); 42 status.sum = 0; 43 SetSstatus(status.val); 44 } 45 46 47 typedef struct arch_cpu_info { 48 uint64 hartId; 49 } arch_cpu_info; 50 51 52 #ifdef __cplusplus 53 extern "C" { 54 #endif 55 56 57 void __riscv64_setup_system_time(uint64 conversionFactor); 58 59 60 static inline void 61 arch_cpu_pause(void) 62 { 63 // TODO: CPU pause 64 } 65 66 67 static inline void 68 arch_cpu_idle(void) 69 { 70 Wfi(); 71 } 72 73 74 #ifdef __cplusplus 75 } 76 #endif 77 78 79 #endif /* _KERNEL_ARCH_RISCV64_CPU_H */ 80