xref: /haiku/headers/private/kernel/arch/m68k/arch_mmu.h (revision cda5b8808fd0262f0fac472f6cfa809f846a83cf)
1 /*
2 ** Copyright 2003, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
3 ** Distributed under the terms of the OpenBeOS License.
4 */
5 #ifndef _KERNEL_ARCH_M68K_MMU_H
6 #define _KERNEL_ARCH_M68K_MMU_H
7 
8 
9 #include <SupportDefs.h>
10 #include <string.h>
11 
12 #include <arch_cpu.h>
13 
14 /*
15  * cf.
16  * "mc68030 Enhanced 32-bit Microprocessor User's Manual"
17  * (3rd edition), Section 9
18  * "mc68040 Enhanced 32-bit Microprocessor User's Manual"
19  * Section 9
20  *
21  * The 030 pmmu can support up to 6-level translation tree,
22  * each level using an size-selectable index from the
23  * virtual address, short (4-bit) and long (8-bit) page table
24  * and page entry descriptors, early tree termination, and selectable
25  * page size from 256 bytes to 32K.
26  * There is optionally a separate Supervisor Root Pointer to separate
27  * the user and kernel trees.
28  *
29  * The 040 pmmu however is way more limited in its abilities.
30  * It has a fixed 3-level page tree, with 7/7/6 bit splitting for
31  * 4K pages. The opcodes are also different so we will need specific
32  * routines. Both supervisor and root pointers must be used so we can't
33  * reuse one of them.
34  *
35  *
36  * We settle to:
37  * - 1 bit index for the first level to easily split kernel and user
38  * part of the tree, with the possibility to force supervisor only for
39  * the kernel tree. The use of SRP to point to a 2nd tree is avoided as
40  * it is not available on 68060, plus that makes a spare 64bit reg to
41  * stuff things in.
42  * - 9 bit page directory
43  * - 10 bit page tables
44  * - 12 bit page index (4K pages, a common value).
45  */
46 
47 
48 
49 enum descriptor_types {
50 	DT_INVALID = 0,			// invalid entry
51 	DT_PAGE,				// page descriptor
52 	DT_VALID_4,				// short page table descriptor
53 	DT_VALID_8,				// long page table descriptor
54 };
55 
56 #if 0
57 /* This is the normal layout of the descriptors, as per documentation.
58  * When page size > 256, several bits are unused in the LSB of page
59  * addresses, which we can use in addition of other unused bits.
60  * the structs dedlared later reflect this for 4K pages.
61  */
62 
63 struct short_page_directory_entry {
64 	// upper 32 bits
65 	uint32 type : 2;
66 	uint32 write_protect : 1;
67 	uint32 used : 1;
68 	uint32 address : 28;
69 };
70 
71 struct long_page_directory_entry {
72 	// upper 32 bits
73 	uint32 type : 2;
74 	uint32 write_protect : 1;
75 	uint32 used : 1;
76 	uint32 _zero1 : 4;
77 	uint32 supervisor : 1;
78 	uint32 _zero2 : 1;
79 	uint32 _ones : 6;
80 	uint32 limit : 15;
81 	uint32 low_up : 1;						// limit is lower(1)/upper(0)
82 	// lower 32 bits
83 	uint32 unused : 4;						//
84 	uint32 address : 28;
85 };
86 
87 struct short_page_table_entry {
88 	uint32 type : 2;
89 	uint32 write_protect : 1;
90 	uint32 used : 1;
91 	uint32 modified : 1;
92 	uint32 _zero1 : 1;
93 	uint32 cache_inhibit : 1;
94 	uint32 _zero2 : 1;
95 	uint32 address : 24;
96 };
97 
98 struct long_page_table_entry {
99 	// upper 32 bits
100 	uint32 type : 2;
101 	uint32 write_protect : 1;
102 	uint32 used : 1;
103 	uint32 modified : 1;
104 	uint32 _zero1 : 1;
105 	uint32 cache_inhibit : 1;
106 	uint32 _zero2 : 1;
107 	uint32 supervisor : 1;
108 	uint32 _zero3 : 1;
109 	uint32 _ones : 6;
110 	// limit only used on early table terminators, else unused
111 	uint32 limit : 15;
112 	uint32 low_up : 1;						// limit is lower(1)/upper(0)
113 	// lower 32 bits
114 	uint32 unused : 8;						//
115 	uint32 address : 24;
116 };
117 #endif
118 
119 /* ppc
120 extern void m68k_get_page_table(page_table_entry_group **_pageTable, size_t *_size);
121 extern void m68k_set_page_table(page_table_entry_group *pageTable, size_t size);
122 */
123 
124 #endif	/* _KERNEL_ARCH_M68K_MMU_H */
125