xref: /haiku/headers/private/kernel/arch/m68k/arch_mmu.h (revision a3e794ae459fec76826407f8ba8c94cd3535f128)
1 /*
2 ** Copyright 2003, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
3 ** Distributed under the terms of the OpenBeOS License.
4 */
5 #ifndef _KERNEL_ARCH_M68K_MMU_H
6 #define _KERNEL_ARCH_M68K_MMU_H
7 
8 
9 #include <SupportDefs.h>
10 #include <string.h>
11 
12 
13 /*
14  * cf.
15  * "mc68030 Enhanced 32-bit Microprocessor User's Manual"
16  * (3rd edition), Section 9
17  * "mc68040 Enhanced 32-bit Microprocessor User's Manual"
18  * Section 9
19  *
20  * The 030 pmmu can support up to 6-level translation tree,
21  * each level using an size-selectable index from the
22  * virtual address, short (4-bit) and long (8-bit) page table
23  * and page entry descriptors, early tree termination, and selectable
24  * page size from 256 bytes to 32K.
25  * There is optionally a separate Supervisor Root Pointer to separate
26  * the user and kernel trees.
27  *
28  * The 040 pmmu however is way more limited in its abilities.
29  * It has a fixed 3-level page tree, with 7/7/6 bit splitting for
30  * 4K pages. The opcodes are also different so we will need specific
31  * routines. Both supervisor and root pointers must be used so we can't
32  * reuse one of them.
33  *
34  *
35  * We settle to:
36  * - 1 bit index for the first level to easily split kernel and user
37  * part of the tree, with the possibility to force supervisor only for
38  * the kernel tree. The use of SRP to point to a 2nd tree is avoided as
39  * it is not available on 68060, plus that makes a spare 64bit reg to
40  * stuff things in.
41  * - 9 bit page directory
42  * - 10 bit page tables
43  * - 12 bit page index (4K pages, a common value).
44  */
45 
46 
47 
48 enum descriptor_types {
49 	DT_INVALID = 0,			// invalid entry
50 	DT_PAGE,				// page descriptor
51 	DT_VALID_4,				// short page table descriptor
52 	DT_VALID_8,				// long page table descriptor
53 };
54 
55 #define M68K_PE_DT_MASK	0x00000003
56 #define DT_MASK	M68K_PE_DT_MASK
57 
58 #if 0
59 /* This is the normal layout of the descriptors, as per documentation.
60  * When page size > 256, several bits are unused in the LSB of page
61  * addresses, which we can use in addition of other unused bits.
62  * the structs dedlared later reflect this for 4K pages.
63  */
64 
65 struct short_page_directory_entry {
66 	// upper 32 bits
67 	uint32 type : 2;
68 	uint32 write_protect : 1;
69 	uint32 used : 1;
70 	uint32 address : 28;
71 };
72 
73 struct long_page_directory_entry {
74 	// upper 32 bits
75 	uint32 type : 2;
76 	uint32 write_protect : 1;
77 	uint32 used : 1;
78 	uint32 _zero1 : 4;
79 	uint32 supervisor : 1;
80 	uint32 _zero2 : 1;
81 	uint32 _ones : 6;
82 	uint32 limit : 15;
83 	uint32 low_up : 1;						// limit is lower(1)/upper(0)
84 	// lower 32 bits
85 	uint32 unused : 4;						//
86 	uint32 address : 28;
87 };
88 
89 struct short_page_table_entry {
90 	uint32 type : 2;
91 	uint32 write_protect : 1;
92 	uint32 used : 1;
93 	uint32 modified : 1;
94 	uint32 _zero1 : 1;
95 	uint32 cache_inhibit : 1;
96 	uint32 _zero2 : 1;
97 	uint32 address : 24;
98 };
99 
100 struct long_page_table_entry {
101 	// upper 32 bits
102 	uint32 type : 2;
103 	uint32 write_protect : 1;
104 	uint32 used : 1;
105 	uint32 modified : 1;
106 	uint32 _zero1 : 1;
107 	uint32 cache_inhibit : 1;
108 	uint32 _zero2 : 1;
109 	uint32 supervisor : 1;
110 	uint32 _zero3 : 1;
111 	uint32 _ones : 6;
112 	// limit only used on early table terminators, else unused
113 	uint32 limit : 15;
114 	uint32 low_up : 1;						// limit is lower(1)/upper(0)
115 	// lower 32 bits
116 	uint32 unused : 8;						//
117 	uint32 address : 24;
118 };
119 #endif
120 
121 /* ppc
122 extern void m68k_get_page_table(page_table_entry_group **_pageTable, size_t *_size);
123 extern void m68k_set_page_table(page_table_entry_group *pageTable, size_t size);
124 */
125 
126 #endif	/* _KERNEL_ARCH_M68K_MMU_H */
127