1 /* 2 ** Copyright 2003-2004, Axel Dörfler, axeld@pinc-software.de. All rights reserved. 3 ** Distributed under the terms of the Haiku License. 4 */ 5 #ifndef _KERNEL_ARCH_M68K_CPU_H 6 #define _KERNEL_ARCH_M68K_CPU_H 7 8 9 #include <arch/m68k/arch_thread_types.h> 10 #include <kernel.h> 11 12 13 #define PAGE_SIZE 4096 14 15 #warning M68K: check for missing regs/movem 16 struct iframe { 17 /* XXX: order depends on movem */ 18 uint32 d0; 19 uint32 d1; 20 uint32 d2; 21 uint32 d3; 22 uint32 d4; 23 uint32 d5; 24 uint32 d6; 25 uint32 d7; 26 uint32 a0; 27 uint32 a1; 28 uint32 a2; 29 uint32 a3; 30 uint32 a4; 31 uint32 a5; 32 uint32 a6; 33 uint32 a7; 34 /* 030 ex frame: */ 35 uint16 sr; /* contains ccr */ 36 uint32 pc; 37 uint16 vector; /* [12:15] frame type */ 38 /* other stuff depending on frame type... do we really need that ? */ 39 union { 40 struct { 41 uint32 inst; 42 } format2 _PACKED; 43 struct { 44 uint32 inst; 45 uint16 intregs[4]; 46 } format9 _PACKED; 47 struct { 48 uint16 intregs[1]; 49 uint16 ssw; 50 uint16 instpipe_c; 51 uint16 instpipe_b; 52 uint32 faultaddr; 53 uint16 intregs2[2]; 54 uint32 dataout; 55 uint16 intregs3[2]; 56 } formata _PACKED; 57 struct { 58 uint16 intregs[1]; 59 uint16 ssw; 60 uint16 instpipe_c; 61 uint16 instpipe_b; 62 uint32 faultaddr; 63 uint16 intregs2[2]; 64 uint32 dataout; 65 uint16 intregs3[4]; 66 uint32 stbaddr; 67 uint16 intregs4[2]; 68 uint32 datain; 69 uint16 intregs5[3]; 70 uint16 intinfo; 71 uint16 intregs6[18]; 72 } formatb _PACKED; 73 }; 74 /* uint32 vector; 75 uint32 srr0; 76 uint32 srr1; 77 uint32 dar; 78 uint32 dsisr; 79 uint32 lr; 80 uint32 cr; 81 uint32 xer; 82 uint32 ctr; 83 uint32 fpscr; 84 uint32 r31; 85 uint32 r30; 86 uint32 r29; 87 uint32 r28; 88 uint32 r27; 89 uint32 r26; 90 uint32 r25; 91 uint32 r24; 92 uint32 r23; 93 uint32 r22; 94 uint32 r21; 95 uint32 r20; 96 uint32 r19; 97 uint32 r18; 98 uint32 r17; 99 uint32 r16; 100 uint32 r15; 101 uint32 r14; 102 uint32 r13; 103 uint32 r12; 104 uint32 r11; 105 uint32 r10; 106 uint32 r9; 107 uint32 r8; 108 uint32 r7; 109 uint32 r6; 110 uint32 r5; 111 uint32 r4; 112 uint32 r3; 113 uint32 r2; 114 uint32 r1; 115 uint32 r0; 116 double f31; 117 double f30; 118 double f29; 119 double f28; 120 double f27; 121 double f26; 122 double f25; 123 double f24; 124 double f23; 125 double f22; 126 double f21; 127 double f20; 128 double f19; 129 double f18; 130 double f17; 131 double f16; 132 double f15; 133 double f14; 134 double f13; 135 double f12; 136 double f11; 137 double f10; 138 double f9; 139 double f8; 140 double f7; 141 double f6; 142 double f5; 143 double f4; 144 double f3; 145 double f2; 146 double f1; 147 double f0;*/ 148 } _PACKED; 149 150 enum machine_state { 151 MSR_EXCEPTIONS_ENABLED = 1L << 15, // EE 152 MSR_PRIVILEGE_LEVEL = 1L << 14, // PR 153 MSR_FP_AVAILABLE = 1L << 13, // FP 154 MSR_MACHINE_CHECK_ENABLED = 1L << 12, // ME 155 MSR_EXCEPTION_PREFIX = 1L << 6, // IP 156 MSR_INST_ADDRESS_TRANSLATION = 1L << 5, // IR 157 MSR_DATA_ADDRESS_TRANSLATION = 1L << 4, // DR 158 }; 159 160 //struct block_address_translation; 161 162 typedef struct arch_cpu_info { 163 int null; 164 } arch_cpu_info; 165 166 167 #ifdef __cplusplus 168 extern "C" { 169 #endif 170 171 #if 0 172 //PPC stuff 173 extern uint32 get_sdr1(void); 174 extern void set_sdr1(uint32 value); 175 extern uint32 get_sr(void *virtualAddress); 176 extern void set_sr(void *virtualAddress, uint32 value); 177 extern uint32 get_msr(void); 178 extern uint32 set_msr(uint32 value); 179 extern uint32 get_pvr(void); 180 181 extern void set_ibat0(struct block_address_translation *bat); 182 extern void set_ibat1(struct block_address_translation *bat); 183 extern void set_ibat2(struct block_address_translation *bat); 184 extern void set_ibat3(struct block_address_translation *bat); 185 extern void set_dbat0(struct block_address_translation *bat); 186 extern void set_dbat1(struct block_address_translation *bat); 187 extern void set_dbat2(struct block_address_translation *bat); 188 extern void set_dbat3(struct block_address_translation *bat); 189 190 extern void get_ibat0(struct block_address_translation *bat); 191 extern void get_ibat1(struct block_address_translation *bat); 192 extern void get_ibat2(struct block_address_translation *bat); 193 extern void get_ibat3(struct block_address_translation *bat); 194 extern void get_dbat0(struct block_address_translation *bat); 195 extern void get_dbat1(struct block_address_translation *bat); 196 extern void get_dbat2(struct block_address_translation *bat); 197 extern void get_dbat3(struct block_address_translation *bat); 198 199 extern void reset_ibats(void); 200 extern void reset_dbats(void); 201 #endif 202 203 //extern void sethid0(unsigned int val); 204 //extern unsigned int getl2cr(void); 205 //extern void setl2cr(unsigned int val); 206 extern long long get_time_base(void); 207 208 void __m68k_setup_system_time(vint32 *cvFactor); 209 // defined in libroot: os/arch/system_time.c 210 int64 __m68k_get_time_base(void); 211 // defined in libroot: os/arch/system_time_asm.S 212 213 extern void m68k_context_switch(void **_oldStackPointer, void *newStackPointer); 214 215 extern bool m68k_set_fault_handler(addr_t *handlerLocation, addr_t handler) 216 __attribute__((noinline)); 217 218 #ifdef __cplusplus 219 } 220 #endif 221 222 struct m68k_cpu_ops { 223 void (*flush_insn_pipeline)(void); 224 void (*flush_atc_all)(void); 225 void (*flush_atc_user)(void); 226 void (*flush_atc_addr)(void *addr); 227 void (*flush_dcache)(void *address, size_t len); 228 void (*flush_icache)(void *address, size_t len); 229 void (*idle)(void); 230 }; 231 232 extern struct m68k_cpu_ops cpu_ops; 233 234 //#define 235 236 #if 0 237 #define eieio() asm volatile("eieio") 238 #define isync() asm volatile("isync") 239 #define tlbsync() asm volatile("tlbsync") 240 #define ppc_sync() asm volatile("sync") 241 #define tlbia() asm volatile("tlbia") 242 #define tlbie(addr) asm volatile("tlbie %0" :: "r" (addr)) 243 #endif 244 245 // m68k processor version. 246 enum m68k_processor_version { 247 /* those two we don't support */ 248 CPU_68000 = 0x0000, 249 CPU_68010 = 0x0001, 250 /* maybe with a pmmu and fpu */ 251 CPU_68020 = 0x0002, 252 /* should work */ 253 CPU_68030 = 0x0003, 254 CPU_68040 = 0x0004, 255 CPU_68060 = 0x0006, 256 /* mask */ 257 CPU_MASK = 0x000F 258 }; 259 260 enum m68k_fpu_version { 261 /* we don't support */ 262 FPU_NONE = 0x0000, 263 FPU_68881 = 0x0010, 264 FPU_68882 = 0x0020, 265 FPU_030 = 0x0030, 266 FPU_040 = 0x0040, 267 FPU_060 = 0x0060, 268 FPU_MASK = 0x00F0 269 }; 270 271 enum m68k_mmu_version { 272 MMU_NONE = 0x0000, 273 MMU_68551 = 0x0100, 274 MMU_68030 = 0x0300, 275 MMU_68040 = 0x0400, 276 MMU_68060 = 0x0600, 277 MMU_MASK = 0x0F00 278 }; 279 280 extern int arch_cpu_type; 281 extern int arch_fpu_type; 282 extern int arch_mmu_type; 283 extern int arch_platform; 284 285 /* 286 Use of (some) special purpose registers. 287 XXX: those regs aren't implemented/accessed the same way on different cpus... 288 289 SRP[63-32]: current struct thread* 290 SRP[31-0] : 291 CAAR : can we use it ?? 292 MSP : 293 294 PPC: 295 SPRG0: per CPU physical address pointer to an ppc_cpu_exception_context 296 structure 297 SPRG1: scratch 298 SPRG2: current struct thread* 299 SPRG3: TLS base pointer (only for userland threads) 300 */ 301 302 #endif /* _KERNEL_ARCH_PPC_CPU_H */ 303