13a72e3ebSJaroslaw Pelczar /* 23a72e3ebSJaroslaw Pelczar * Copyright 2018, Jaroslaw Pelczar <jarek@jpelczar.com> 33a72e3ebSJaroslaw Pelczar * Distributed under the terms of the MIT License. 43a72e3ebSJaroslaw Pelczar */ 53a72e3ebSJaroslaw Pelczar #ifndef _KERNEL_ARCH_ARM64_ARCH_VM_TRANSLATION_MAP_H_ 63a72e3ebSJaroslaw Pelczar #define _KERNEL_ARCH_ARM64_ARCH_VM_TRANSLATION_MAP_H_ 73a72e3ebSJaroslaw Pelczar 8*50bb5202SOwen Anderson // The base address of TTBR*_EL1 is in bits [47:1] of the register, and the 9*50bb5202SOwen Anderson // low bit is implicitly zero. 10*50bb5202SOwen Anderson static constexpr uint64_t kTtbrBasePhysAddrMask = (((1UL << 47) - 1) << 1); 11*50bb5202SOwen Anderson 12c37d2d8eSOwen Anderson void arch_vm_install_empty_table_ttbr0(void); 133a72e3ebSJaroslaw Pelczar 143a72e3ebSJaroslaw Pelczar #endif /* _KERNEL_ARCH_ARM64_ARCH_VM_TRANSLATION_MAP_H_ */ 15