1 /* 2 * Copyright (c) 2008 Travis Geiselbrecht 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining 5 * a copy of this software and associated documentation files 6 * (the "Software"), to deal in the Software without restriction, 7 * including without limitation the rights to use, copy, modify, merge, 8 * publish, distribute, sublicense, and/or sell copies of the Software, 9 * and to permit persons to whom the Software is furnished to do so, 10 * subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #ifndef __PLATFORM_PXA270_H 24 #define __PLATFORM_PXA270_H 25 26 #define SDRAM_BASE 0xa2000000 27 28 /* UART */ 29 #define FFUART_BASE 0x40100000 30 #define BTUART_BASE 0x40200000 31 #define STUART_BASE 0x40700000 32 #define CKEN 0x41300004 33 #define UART_RHR 0 34 #define UART_THR 0 35 #define UART_DLL 0 36 #define UART_IER 1 37 #define UART_DLH 1 38 #define UART_IIR 2 39 #define UART_FCR 2 40 #define UART_EFR 2 41 #define UART_LCR 3 42 #define UART_MCR 4 43 #define UART_LSR 5 44 #define UART_MSR 6 45 #define UART_TCR 6 46 #define UART_SPR 7 47 #define UART_TLR 7 48 #define UART_MDR1 8 49 #define UART_MDR2 9 50 #define UART_SFLSR 10 51 #define UART_RESUME 11 52 #define UART_TXFLL 10 53 #define UART_TXFLH 11 54 #define UART_SFREGL 12 55 #define UART_SFREGH 13 56 #define UART_RXFLL 12 57 #define UART_RXFLH 13 58 #define UART_BLR 14 59 #define UART_UASR 14 60 #define UART_ACREG 15 61 #define UART_SCR 16 62 #define UART_SSR 17 63 #define UART_EBLR 18 64 #define UART_MVR 19 65 #define UART_SYSC 20 66 67 /* DMA controller */ 68 69 typedef struct pxa27x_dma_descriptor { 70 uint32 ddadr; 71 uint32 dsadr; 72 uint32 dtadr; 73 uint32 dcmd; 74 } pxa27x_dma_descriptor __attribute__ ((aligned(16))); 75 76 /* LCD controller */ 77 78 #define LCC_BASE 0x44000000 79 80 #define LCCR0 (LCC_BASE+0x00) 81 #define LCCR1 (LCC_BASE+0x04) 82 #define LCCR2 (LCC_BASE+0x08) 83 #define LCCR3 (LCC_BASE+0x0C) 84 #define LCCR4 (LCC_BASE+0x10) 85 #define LCCR5 (LCC_BASE+0x14) 86 87 #define LCSR1 (LCC_BASE+0x34) 88 #define LCSR0 (LCC_BASE+0x38) 89 #define LIIDR (LCC_BASE+0x3C) 90 91 #define OVL1C1 (LCC_BASE+0x50) 92 #define OVL1C2 (LCC_BASE+0x60) 93 #define OVL2C1 (LCC_BASE+0x70) 94 #define OVL2C2 (LCC_BASE+0x80) 95 96 #define LCC_CCR (LCC_BASE+0x90) 97 #define LCC_CMDCR (LCC_BASE+0x100) 98 99 #define FDADR0 (LCC_BASE+0x200) 100 #define FBR0 (LCC_BASE+0x020) 101 #define FSADR0 (LCC_BASE+0x204) 102 103 typedef struct pxa27x_lcd_dma_descriptor { 104 uint32 fdadr; 105 uint32 fsadr; 106 uint32 fidr; 107 uint32 ldcmd; 108 } pxa27x_lcd_dma_descriptor __attribute__ ((aligned(16))); 109 110 #endif /* __PLATFORM_PXA270_H */ 111