1 /* 2 ** Copyright 2003-2004, Axel Dörfler, axeld@pinc-software.de. All rights reserved. 3 ** Distributed under the terms of the Haiku License. 4 */ 5 #ifndef _KERNEL_ARCH_ARM_CPU_H 6 #define _KERNEL_ARCH_ARM_CPU_H 7 8 9 #define CPU_MAX_CACHE_LEVEL 8 10 #define CACHE_LINE_SIZE 64 11 // TODO: Could be 32-bits sometimes? 12 13 14 #define set_ac() 15 #define clear_ac() 16 17 18 #ifndef _ASSEMBLER 19 20 #include <arch/arm/arch_thread_types.h> 21 #include <kernel.h> 22 23 24 /* raw exception frames */ 25 struct iframe { 26 uint32 spsr; 27 uint32 r0; 28 uint32 r1; 29 uint32 r2; 30 uint32 r3; 31 uint32 r4; 32 uint32 r5; 33 uint32 r6; 34 uint32 r7; 35 uint32 r8; 36 uint32 r9; 37 uint32 r10; 38 uint32 r11; 39 uint32 r12; 40 uint32 usr_sp; 41 uint32 usr_lr; 42 uint32 svc_sp; 43 uint32 svc_lr; 44 uint32 pc; 45 } _PACKED; 46 47 /**! Values for arch_cpu_info.arch */ 48 enum { 49 ARCH_ARM_PRE_ARM7, 50 ARCH_ARM_v3, 51 ARCH_ARM_v4, 52 ARCH_ARM_v4T, 53 ARCH_ARM_v5, 54 ARCH_ARM_v5T, 55 ARCH_ARM_v5TE, 56 ARCH_ARM_v5TEJ, 57 ARCH_ARM_v6, 58 ARCH_ARM_v7 59 }; 60 61 typedef struct arch_cpu_info { 62 /* For a detailed interpretation of these values, 63 see "The System Control coprocessor", 64 "Main ID register" in your ARM ARM */ 65 int implementor; 66 int part_number; 67 int revision; 68 int variant; 69 int arch; 70 } arch_cpu_info; 71 72 #ifdef __cplusplus 73 extern "C" { 74 #endif 75 76 extern addr_t arm_get_far(void); 77 extern int32 arm_get_fsr(void); 78 extern addr_t arm_get_fp(void); 79 80 extern int mmu_read_c1(void); 81 extern int mmu_write_c1(int val); 82 83 84 static inline void 85 arch_cpu_pause(void) 86 { 87 // TODO: ARM Priority pause call 88 } 89 90 91 static inline void 92 arch_cpu_idle(void) 93 { 94 uint32 Rd = 0; 95 asm volatile("mcr p15, 0, %[c7format], c7, c0, 4" 96 : : [c7format] "r" (Rd) ); 97 } 98 99 100 #ifdef __cplusplus 101 }; 102 #endif 103 104 #endif // !_ASSEMBLER 105 106 #endif /* _KERNEL_ARCH_ARM_CPU_H */ 107