193ee2104SAxel Dörfler /* 2e549b218SAxel Dörfler * Copyright 2005-2008, Axel Dörfler, axeld@pinc-software.de. All rights reserved. 393ee2104SAxel Dörfler * Distributed under the terms of the MIT License. 493ee2104SAxel Dörfler */ 593ee2104SAxel Dörfler #ifndef VESA_INFO_H 693ee2104SAxel Dörfler #define VESA_INFO_H 793ee2104SAxel Dörfler 893ee2104SAxel Dörfler 993ee2104SAxel Dörfler #include <Drivers.h> 1093ee2104SAxel Dörfler #include <Accelerant.h> 1193ee2104SAxel Dörfler #include <PCI.h> 1293ee2104SAxel Dörfler 1393ee2104SAxel Dörfler 14e549b218SAxel Dörfler #define VESA_MODES_BOOT_INFO "vesa_modes/v1" 1593ee2104SAxel Dörfler 16e549b218SAxel Dörfler struct vesa_mode { 17*9f161845SAxel Dörfler uint16 mode; 18e549b218SAxel Dörfler uint16 width; 19e549b218SAxel Dörfler uint16 height; 20e549b218SAxel Dörfler uint8 bits_per_pixel; 21e549b218SAxel Dörfler }; 2293ee2104SAxel Dörfler 2393ee2104SAxel Dörfler struct vesa_shared_info { 2493ee2104SAxel Dörfler int32 type; 2593ee2104SAxel Dörfler area_id mode_list_area; // area containing display mode list 2693ee2104SAxel Dörfler uint32 mode_count; 2793ee2104SAxel Dörfler display_mode current_mode; 2893ee2104SAxel Dörfler uint32 bytes_per_row; 2993ee2104SAxel Dörfler 3093ee2104SAxel Dörfler area_id frame_buffer_area; // area of frame buffer 31e549b218SAxel Dörfler uint8 *frame_buffer; 32e549b218SAxel Dörfler // pointer to frame buffer (visible by all apps!) 3393ee2104SAxel Dörfler uint8 *physical_frame_buffer; 3493ee2104SAxel Dörfler 35e549b218SAxel Dörfler uint32 vesa_mode_offset; 36e549b218SAxel Dörfler uint32 vesa_mode_count; 3793ee2104SAxel Dörfler }; 3893ee2104SAxel Dörfler 3993ee2104SAxel Dörfler //----------------- ioctl() interface ---------------- 4093ee2104SAxel Dörfler 4193ee2104SAxel Dörfler // list ioctls 4293ee2104SAxel Dörfler enum { 4393ee2104SAxel Dörfler VESA_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1, 4493ee2104SAxel Dörfler VESA_GET_DEVICE_NAME, 45*9f161845SAxel Dörfler VESA_SET_DISPLAY_MODE, 460c6f7795SAxel Dörfler 470c6f7795SAxel Dörfler VGA_SET_INDEXED_COLORS, 480c6f7795SAxel Dörfler VGA_PLANAR_BLIT, 490c6f7795SAxel Dörfler }; 500c6f7795SAxel Dörfler 510c6f7795SAxel Dörfler struct vga_set_indexed_colors_args { 520c6f7795SAxel Dörfler uint8 first; 530c6f7795SAxel Dörfler uint16 count; 540c6f7795SAxel Dörfler uint8 *colors; 550c6f7795SAxel Dörfler }; 560c6f7795SAxel Dörfler 570c6f7795SAxel Dörfler struct vga_planar_blit_args { 580c6f7795SAxel Dörfler uint8 *source; 590c6f7795SAxel Dörfler int32 source_bytes_per_row; 600c6f7795SAxel Dörfler int32 left; 610c6f7795SAxel Dörfler int32 top; 620c6f7795SAxel Dörfler int32 right; 630c6f7795SAxel Dörfler int32 bottom; 6493ee2104SAxel Dörfler }; 6593ee2104SAxel Dörfler 6693ee2104SAxel Dörfler #endif /* VESA_INFO_H */ 67