1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon accelerant 6 7 Interface between kernel driver and accelerant 8 */ 9 10 11 #ifndef _RADEON_INTERFACE_H 12 #define _RADEON_INTERFACE_H 13 14 #include <Accelerant.h> 15 #include <Drivers.h> 16 #include <PCI.h> 17 #include <OS.h> 18 #include "video_overlay.h" 19 #include "benaphore.h" 20 21 22 // magic code for ioctls 23 #define RADEON_PRIVATE_DATA_MAGIC 'TKRA' 24 25 #define MAX_RADEON_DEVICE_NAME_LENGTH MAXPATHLEN 26 27 // list ioctls 28 enum { 29 RADEON_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1, 30 31 RADEON_DEVICE_NAME, 32 RADEON_GET_LOG_SIZE, 33 RADEON_GET_LOG_DATA, 34 RADEON_ALLOC_LOCAL_MEM, 35 RADEON_FREE_LOCAL_MEM, 36 37 RADEON_SET_I2C_SIGNALS, 38 RADEON_GET_I2C_SIGNALS 39 }; 40 41 42 // list of multi-monitor modes 43 typedef enum { 44 mm_none, // use one display only 45 mm_combine, // combine displays to larger workspace 46 mm_clone, // clone workspace, all displays show the 47 // same but have independant timing 48 mm_mirror // mirror ports (as used by Laptop) - not implemented yet 49 } multi_mode_e; 50 51 52 // type of monitor connected 53 typedef enum { 54 dt_none, 55 dt_crt_1, // CRT on primary port (i.e. via DVI2CRT adapter) 56 dt_crt_2, // CRT on secondary port (i.e. standard CRT connector) 57 dt_lvds, // laptop flap panel 58 dt_dvi_1, // DVI on primary port (i.e. standard DVI connector) 59 60 // the following connectors/devices are not supported 61 dt_dvi_2, // DVI on secondary port (only provided by few models) 62 dt_ctv, // composite TV 63 dt_stv // S-Video out 64 } display_type_e; 65 66 67 // type of ASIC 68 typedef enum { 69 rt_r100, // original Radeon 70 rt_ve, // original VE version 71 rt_m6, // original mobile Radeon 72 rt_rv200, // Radeon 7500 73 rt_m7, // mobile Radeon 7500 74 rt_r200, // Radeon 8500/9100 75 rt_rv250, // Radeon 9000 76 rt_rv280, // Radeon 9200 77 rt_m9, // mobile Radeon 9000 78 rt_r300, // Radeon 9700 79 rt_r300_4p, // Radeon 9500 80 rt_rv350, // Radeon 9600 81 rt_rv360, // Radeon 9600 82 rt_r350, // Radeon 9800 83 rt_r360 // Radeon 9800 84 } radeon_type; 85 86 87 // info about cursor 88 typedef struct { 89 uint8* data; // pointer to framebuffer containing cursor image 90 uint16 hot_x; 91 uint16 hot_y; 92 uint16 x; 93 uint16 y; 94 uint16 width; 95 uint16 height; 96 uint32 mem_handle; // memory handle 97 uint32 fb_offset; // offset in frame buffer 98 bool is_visible; // official flag whether cursor is visible 99 } cursor_info; 100 101 102 // list of register content (used for mode changes) 103 typedef struct { 104 // CRTC regs 105 uint32 crtc_h_total_disp; 106 uint32 crtc_h_sync_strt_wid; 107 uint32 crtc_v_total_disp; 108 uint32 crtc_v_sync_strt_wid; 109 uint32 crtc_pitch; 110 uint32 crtc_gen_cntl; 111 uint32 crtc_ext_cntl; 112 uint32 crtc_offset_cntl; 113 114 // Flat panel regs 115 // many of them aren't touched by us, so they aren't stored here 116 uint32 fp_gen_cntl; 117 uint32 fp_horz_stretch; 118 uint32 fp_panel_cntl; 119 uint32 fp_vert_stretch; 120 uint32 lvds_gen_cntl; 121 122 // DAC regs 123 uint32 dac_cntl; 124 //uint32 dac2_cntl; 125 126 // PLL regs 127 uint32 ppll_div_3; 128 uint32 ppll_ref_div; 129 uint32 htotal_cntl; 130 131 uint32 dot_clock_freq; // in 10 kHz 132 uint32 pll_output_freq;// in 10 kHz 133 int feedback_div; 134 int post_div; 135 136 // Common regs 137 uint32 surface_cntl; 138 uint32 disp_output_cntl; 139 } port_regs; 140 141 142 // port as seen by accelerant 143 typedef struct { 144 bool is_crtc2; 145 int physical_port; // idx of physical port 146 147 uint32 rel_x, rel_y; // relative position in multi-monitor mode 148 bool cursor_on_screen; // cursor is visible on this port 149 150 display_mode mode; // display mode of this port 151 } virtual_port; 152 153 154 // physical port 155 typedef struct { 156 display_type_e disp_type; 157 sem_id vblank; // vertical blank interrupt semaphore 158 } physical_port; 159 160 161 // info about flat panel connected to port 162 typedef struct { 163 uint panel_pwr_delay; 164 uint panel_xres, panel_yres; 165 166 uint h_blank, h_over_plus, h_sync_width; 167 uint v_blank, v_over_plus, v_sync_width; 168 uint dot_clock; // in kHz (this is BeOS like, ATI uses 10 kHz steps!) 169 170 display_type_e disp_type; 171 172 uint64 h_ratio; // current stretch ratio, needed for overlays 173 uint64 v_ratio; // (mode_res/native_res; 16.16) 174 } fp_info; 175 176 177 // info about PLL on graphics card 178 typedef struct { 179 uint32 max_pll_freq; 180 uint32 min_pll_freq; 181 uint32 xclk; 182 uint32 ref_div; 183 uint32 ref_freq; 184 } pll_info; 185 186 187 typedef struct overlay_buffer_node { 188 struct overlay_buffer_node *next, *prev; 189 uint32 mem_handle; 190 uint32 mem_offset; 191 uint ati_space; // colour space according to ATI 192 uint test_reg; // content of test reg 193 overlay_buffer buffer; 194 } overlay_buffer_node; 195 196 typedef struct { 197 overlay_token ot; 198 overlay_buffer ob; 199 overlay_window ow; 200 overlay_view ov; 201 uint16 h_display_start; 202 uint16 v_display_start; 203 204 overlay_buffer_node *on; 205 int8 port; // physical port where the overlay is shown on 206 uint32 rel_offset; // offset of overlay source due to clipping 207 } overlay_info; 208 209 // each accelerator gets one "virtual card", i.e. you 210 // can have independant accelerators for each port 211 // (this is an ongoing project ;) 212 typedef struct { 213 uint32 id; // identifier used to know which card the 2D accelerator 214 // is prepared for (we use area_id of this structure) 215 virtual_port ports[2]; 216 uint8 num_ports; 217 218 int8 independant_ports; // number of ports to be programmed independantly 219 int8 different_ports; // number of ports showing different parts of framebuffer 220 bool scroll; // scrolling in virtual area enabled 221 222 uint32 datatype; // Radeon code for pixel format 223 uint bpp; // bytes per pixel 224 uint32 pitch; // byte offset between two lines 225 226 uint32 eff_width, eff_height; // size of visible area (including both monitors) 227 uint32 fb_mem_handle; // memory handle 228 uint32 fb_offset; // offset of frame buffer in graphics mem 229 230 cursor_info cursor; 231 232 multi_mode_e wanted_multi_mode; // multi monitor mode as requested by user 233 234 bool swapDisplays; // true to swap monitors 235 236 frame_buffer_config fbc; // data for direct frame buffer access 237 238 display_mode mode; // offical mode with multi-monitor bits set 239 overlay_buffer_node *overlay_buffers; // list of allocated overlay buffers 240 241 //int8 whished_overlay_port; // port where users whishes the overlay to be 242 bool uses_overlay; // true if this virtual card owns overlay 243 } virtual_card; 244 245 typedef struct { 246 vint32 inuse; // one, if someone allocated overlay port 247 // (this doesn't necessarily mean that an overlay is shown) 248 uint32 token; // arbitrarily chosen token to identify overlay owner 249 // (increased by 1 whenever there is a new owner) 250 uint32 auto_flip_reg; // content of auto_flip_reg 251 } overlay_mgr_info; 252 253 // data published by kernel and shared by all accelerant/virtual cards 254 typedef struct { 255 // filled out by kernel 256 uint16 vendor_id; // PCI vendor id 257 uint16 device_id; // PCI device id 258 uint8 revision; // PCI device revision 259 260 bool has_crtc2; // has second CRTC 261 radeon_type asic; 262 263 pll_info pll; 264 265 area_id regs_area; // area of memory mapped registers 266 area_id fb_area; // area of frame buffer 267 uint8 *framebuffer; // pointer to frame buffer (visible by all apps!) 268 void *framebuffer_pci; // physical address of frame buffer 269 270 physical_port ports[2]; 271 fp_info fp_port; 272 273 uint32 local_mem_size; // size of graphics memory 274 275 uint32 AGP_vm_start; // logical address (for graphics card) of AGP memory 276 uint32 AGP_vm_size; // size of AGP address range 277 278 uint32 nonlocal_vm_start; // logical address (for graphics card) of nonlocal memory 279 // always use this one, as it is valid in PCI mode too 280 uint32 *nonlocal_mem; // logical address (for CPU) of nonlocal memory 281 uint32 nonlocal_mem_size; // size of nonlocal memory 282 283 284 // set by accelerator 285 struct { 286 uint64 count; // count of submitted CP commands 287 uint64 last_idle; // count when engine was idle last time 288 uint64 written; // last count passed to CP 289 benaphore lock; // engine lock 290 } engine; 291 292 struct { // DMA ring buffer of CP 293 uint32 start_offset; // offset in DMA buffer 294 uint32 tail, tail_mask; // next write position in dwords; mask for wrap-arounds 295 uint32 size; // size in dwords 296 uint32 head_offset; // offset for automatically updates head in DMA buffer 297 298 uint32 *start; // pointer to ring buffer 299 vuint32 *head; // pointer to automatically updates read position 300 } ring; 301 302 vuint32 *scratch_ptr; // pointer to scratch registers (in DMA buffer) 303 304 area_id mode_list_area; // area containing display mode list 305 uint mode_count; 306 307 uint32 active_vc; // currently selected virtual card 308 309 uint32 dac_cntl2; // content of dac_cntl2 register 310 311 overlay_info pending_overlay; 312 overlay_info active_overlay; 313 overlay_mgr_info overlay_mgr; 314 315 // data needed for VBI emulation 316 // (currently not fully implemented - if the user disabled graphics card 317 // IRQ in the BIOS, it's his fault) 318 int refresh_period; // duration of one frame in ms 319 int blank_period; // vertical blank period of a frame in ms 320 int enable_virtual_irq; // true, to enable virtual interrupts 321 322 struct log_info_t *log; // fast logger data 323 } shared_info; 324 325 326 // retrieve the area_id of the kernel/accelerant shared info 327 typedef struct { 328 uint32 magic; // magic number 329 area_id shared_info_area; 330 area_id virtual_card_area; 331 } radeon_get_private_data; 332 333 // get devie name (used to clone accelerant) 334 typedef struct { 335 uint32 magic; // magic number 336 char *name; // pointer to buffer containing name (in) 337 } radeon_device_name; 338 339 // alloc local memory 340 typedef struct { 341 uint32 magic; 342 uint32 size; 343 uint32 fb_offset; 344 uint32 handle; 345 } radeon_alloc_local_mem; 346 347 // free local memory 348 typedef struct { 349 uint32 magic; 350 uint32 handle; 351 } radeon_free_local_mem; 352 353 // get/set i2c signals 354 typedef struct { 355 uint32 magic; 356 int port; 357 int value; 358 } radeon_getset_i2c; 359 360 #endif 361