1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon driver 6 7 Basic PLL registers access 8 */ 9 10 #ifndef _PLL_ACCESS_H 11 #define _PLL_ACCESS_H 12 13 #include "mmio.h" 14 15 16 // r300: to be called after each CLOCK_CNTL_INDEX access; 17 // all functions declared in this header take care of that 18 // (hardware bug fix suggested by XFree86) 19 void R300_PLLFix( vuint8 *regs, radeon_type asic ); 20 21 // in general: 22 // - the PLL is connected via special port 23 // - you need first to choose the PLL register and then write/read its value 24 // 25 // if atomic updates are not safe we: 26 // - verify each time whether the right register is chosen 27 // - verify all values written to PLL-registers 28 29 30 // read value "val" from PLL-register "addr" 31 uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr ); 32 33 // write value "val" to PLL-register "addr" 34 void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val ); 35 36 // write "val" to PLL-register "addr" keeping bits "mask" 37 void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val, uint32 mask ); 38 39 #endif 40