1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon driver 6 7 BusMemory Control registers 8 */ 9 10 #ifndef _MEMCNTRL_REGS_H 11 #define _MEMCNTRL_REGS_H 12 13 #define RADEON_AGP_BASE 0x0170 14 #define RADEON_MEM_CNTL 0x0140 15 16 #define RADEON_MC_AGP_LOCATION 0x014c 17 #define RADEON_MC_FB_LOCATION 0x0148 18 #define RADEON_MEM_INIT_LAT_TIMER 0x0154 19 #define RADEON_MEM_SDRAM_MODE_REG 0x0158 20 # define RADEON_MEM_CFG_TYPE_MASK (1 << 30) 21 # define RADEON_MEM_CFG_SDR (0 << 30) 22 # define RADEON_MEM_CFG_DDR (1 << 30) 23 24 #endif 25