1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon driver 6 7 DAC registers 8 */ 9 10 #ifndef _DAC_REGS_H 11 #define _DAC_REGS_H 12 13 #define RADEON_DAC_CNTL 0x0058 14 # define RADEON_DAC_RANGE_CNTL_MASK (3 << 0) 15 # define RADEON_DAC_RANGE_CNTL_PS2 (2 << 0) 16 # define RADEON_DAC_BLANKING (1 << 2) 17 # define RADEON_DAC_CMP_EN (1 << 3) 18 # define RADEON_DAC_CMP_OUTPUT (1 << 7) 19 # define RADEON_DAC_8BIT_EN (1 << 8) 20 # define RADEON_DAC_VGA_ADR_EN (1 << 13) 21 # define RADEON_DAC_PDWN (1 << 15) 22 # define RADEON_DAC_MASK_ALL (0xff << 24) 23 #define RADEON_DAC_CNTL2 0x007c 24 # define RADEON_DAC_CLK_SEL_MASK (1 << 0) 25 # define RADEON_DAC_CLK_SEL_CRTC (0 << 0) 26 # define RADEON_DAC_CLK_SEL_CRTC2 (1 << 0) 27 # define RADEON_DAC2_CLK_SEL_MASK (1 << 1) 28 # define RADEON_DAC2_CLK_SEL_TV (0 << 1) 29 # define RADEON_DAC2_CLK_SEL_CRT (1 << 1) 30 # define RADEON_DAC2_PALETTE_ACC_CTL (1 << 5) 31 # define RADEON_DAC2_CMP_EN (1 << 7) 32 # define RADEON_DAC2_CMP_OUT_R (1 << 8) 33 # define RADEON_DAC2_CMP_OUT_G (1 << 9) 34 # define RADEON_DAC2_CMP_OUT_B (1 << 10) 35 # define RADEON_DAC2_CMP_OUTPUT (1 << 11) 36 #define RADEON_PALETTE_INDEX 0x00b0 37 #define RADEON_PALETTE_DATA 0x00b4 38 #define RADEON_PALETTE_30_DATA 0x00b8 39 40 #define RADEON_DAC_EXT_CNTL 0x0280 41 # define RADEON_DAC2_FORCE_BLANK_OFF_EN (1 << 0) 42 # define RADEON_DAC2_FORCE_DATA_EN (1 << 1) 43 # define RADEON_DAC_FORCE_BLANK_OFF_EN (1 << 4) 44 # define RADEON_DAC_FORCE_DATA_EN (1 << 5) 45 # define RADEON_DAC_FORCE_DATA_SEL_MASK (3 << 6) 46 # define RADEON_DAC_FORCE_DATA_SEL_R (0 << 6) 47 # define RADEON_DAC_FORCE_DATA_SEL_G (1 << 6) 48 # define RADEON_DAC_FORCE_DATA_SEL_B (2 << 6) 49 # define RADEON_DAC_FORCE_DATA_SEL_RGB (3 << 6) 50 # define RADEON_DAC_FORCE_DATA_SHIFT 8 51 # define RADEON_DAC_FORCE_DATA_MASK (0x3ff << 8) 52 #define RADEON_DAC_CRC_SIG 0x02cc 53 54 #define RADEON_DAC_DATA 0x03c9 /* VGA */ 55 #define RADEON_DAC_MASK 0x03c6 /* VGA */ 56 #define RADEON_DAC_R_INDEX 0x03c7 /* VGA */ 57 #define RADEON_DAC_W_INDEX 0x03c8 /* VGA */ 58 59 #define RADEON_DISP_OUTPUT_CNTL 0x0d64 60 # define RADEON_DISP_DAC_SOURCE_MASK 0x03 61 # define RADEON_DISP_DAC_SOURCE_CRTC1 0x00 62 # define RADEON_DISP_DAC_SOURCE_CRTC2 0x01 63 # define RADEON_DISP_DAC_SOURCE_RMX 0x02 64 # define RADEON_DISP_TVDAC_SOURCE_MASK 0x0c 65 # define RADEON_DISP_TVDAC_SOURCE_CRTC2 0x04 66 67 #define RADEON_DISP_HW_DEBUG 0x0d14 68 # define RADEON_CRT2_DISP1_SEL (1 << 5) 69 70 71 #endif 72