1 /* 2 Copyright (c) 2002, Thomas Kurschel 3 4 5 Part of Radeon driver 6 7 DAC registers 8 */ 9 10 #ifndef _DAC_REGS_H 11 #define _DAC_REGS_H 12 13 #define RADEON_DAC_CNTL 0x0058 14 # define RADEON_DAC_RANGE_CNTL (3 << 0) 15 # define RADEON_DAC_BLANKING (1 << 2) 16 # define RADEON_DAC_8BIT_EN (1 << 8) 17 # define RADEON_DAC_VGA_ADR_EN (1 << 13) 18 # define RADEON_DAC_PDWN (1 << 15) 19 # define RADEON_DAC_MASK_ALL (0xff << 24) 20 #define RADEON_DAC_CNTL2 0x007c 21 # define RADEON_DAC_CLK_SEL (1 << 0) 22 # define RADEON_DAC_CLK_SEL_CRTC (0 << 0) 23 # define RADEON_DAC_CLK_SEL_CRTC2 (1 << 0) 24 # define RADEON_DAC2_CLK_SEL (1 << 1) 25 # define RADEON_DAC2_PALETTE_ACC_CTL (1 << 5) 26 #define RADEON_PALETTE_INDEX 0x00b0 27 #define RADEON_PALETTE_DATA 0x00b4 28 #define RADEON_PALETTE_30_DATA 0x00b8 29 30 #define RADEON_DAC_CRC_SIG 0x02cc 31 #define RADEON_DAC_DATA 0x03c9 /* VGA */ 32 #define RADEON_DAC_MASK 0x03c6 /* VGA */ 33 #define RADEON_DAC_R_INDEX 0x03c7 /* VGA */ 34 #define RADEON_DAC_W_INDEX 0x03c8 /* VGA */ 35 36 #define RADEON_DISP_OUTPUT_CNTL 0x0d64 37 # define RADEON_DISP_DAC_SOURCE_MASK 0x03 38 # define RADEON_DISP_DAC_SOURCE_CRTC2 0x01 39 40 41 #endif 42