14f5f1b3cSshadow303 /* 24f5f1b3cSshadow303 Copyright (c) 2002, Thomas Kurschel 34f5f1b3cSshadow303 44f5f1b3cSshadow303 54f5f1b3cSshadow303 Part of Radeon driver 64f5f1b3cSshadow303 74f5f1b3cSshadow303 BIOS scratch registers 84f5f1b3cSshadow303 */ 94f5f1b3cSshadow303 104f5f1b3cSshadow303 #ifndef _BIOS_REGS_H 114f5f1b3cSshadow303 #define _BIOS_REGS_H 124f5f1b3cSshadow303 134f5f1b3cSshadow303 #define RADEON_BIOS_0_SCRATCH 0x0010 144f5f1b3cSshadow303 #define RADEON_BIOS_1_SCRATCH 0x0014 154f5f1b3cSshadow303 #define RADEON_BIOS_2_SCRATCH 0x0018 164f5f1b3cSshadow303 #define RADEON_BIOS_3_SCRATCH 0x001c 174f5f1b3cSshadow303 #define RADEON_BIOS_4_SCRATCH 0x0020 184f5f1b3cSshadow303 #define RADEON_BIOS_5_SCRATCH 0x0024 194f5f1b3cSshadow303 #define RADEON_BIOS_6_SCRATCH 0x0028 204f5f1b3cSshadow303 #define RADEON_BIOS_7_SCRATCH 0x002c 214f5f1b3cSshadow303 224f5f1b3cSshadow303 #define RADEON_TEST_DEBUG_CNTL 0x0120 23*8f6c61bcSshadow303 # define RADEON_TEST_DEBUG_CNTL_OUT_EN (1 << 0) 244f5f1b3cSshadow303 #define RADEON_TEST_DEBUG_MUX 0x0124 254f5f1b3cSshadow303 #define RADEON_TEST_DEBUG_OUT 0x012c 264f5f1b3cSshadow303 274f5f1b3cSshadow303 #endif 28