1 /* 2 Copyright 1999, Be Incorporated. All Rights Reserved. 3 This file may be used under the terms of the Be Sample Code License. 4 5 Other authors: 6 Mark Watson; 7 Apsed; 8 Rudolf Cornelissen 10/2002-3/2004. 9 */ 10 11 #ifndef DRIVERINTERFACE_H 12 #define DRIVERINTERFACE_H 13 14 #include <Accelerant.h> 15 #include "video_overlay.h" 16 #include <Drivers.h> 17 #include <PCI.h> 18 #include <OS.h> 19 20 #define DRIVER_PREFIX "nv" // apsed 21 22 /* 23 Internal driver state (also for sharing info between driver and accelerant) 24 */ 25 #if defined(__cplusplus) 26 extern "C" { 27 #endif 28 29 typedef struct { 30 sem_id sem; 31 int32 ben; 32 } benaphore; 33 34 #define INIT_BEN(x) x.sem = create_sem(0, "G400 "#x" benaphore"); x.ben = 0; 35 #define AQUIRE_BEN(x) if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem); 36 #define RELEASE_BEN(x) if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem); 37 #define DELETE_BEN(x) delete_sem(x.sem); 38 39 40 #define NV_PRIVATE_DATA_MAGIC 0x0009 /* a private driver rev, of sorts */ 41 42 /*dualhead extensions to flags*/ 43 #define DUALHEAD_OFF (0<<6) 44 #define DUALHEAD_CLONE (1<<6) 45 #define DUALHEAD_ON (2<<6) 46 #define DUALHEAD_SWITCH (3<<6) 47 #define DUALHEAD_BITS (3<<6) 48 #define DUALHEAD_CAPABLE (1<<8) 49 #define TV_BITS (3<<9) 50 #define TV_MON (0<<9 51 #define TV_PAL (1<<9) 52 #define TV_NTSC (2<<9) 53 #define TV_CAPABLE (1<<11) 54 #define TV_VIDEO (1<<12) 55 56 #define SKD_MOVE_CURSOR 0x00000001 57 #define SKD_PROGRAM_CLUT 0x00000002 58 #define SKD_SET_START_ADDR 0x00000004 59 #define SKD_SET_CURSOR 0x00000008 60 #define SKD_HANDLER_INSTALLED 0x80000000 61 62 enum { 63 NV_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1, 64 NV_GET_PCI, 65 NV_SET_PCI, 66 NV_DEVICE_NAME, 67 NV_RUN_INTERRUPTS 68 }; 69 70 /* max. number of overlay buffers */ 71 #define MAXBUFFERS 3 72 73 /* internal used info on overlay buffers */ 74 typedef struct 75 { 76 uint16 slopspace; 77 uint32 size; 78 } int_buf_info; 79 80 typedef struct settings { // apsed, see comments in nv.settings 81 // for driver 82 char accelerant[B_FILE_NAME_LENGTH]; 83 bool dumprom; 84 // for accelerant 85 uint32 logmask; 86 uint32 memory; 87 bool usebios; 88 bool hardcursor; 89 bool greensync; 90 } settings; 91 92 /*shared info*/ 93 typedef struct { 94 /*a few ID things*/ 95 uint16 vendor_id; /* PCI vendor ID, from pci_info */ 96 uint16 device_id; /* PCI device ID, from pci_info */ 97 uint8 revision; /* PCI device revsion, from pci_info */ 98 99 /* bug workaround for 4.5.0 */ 100 uint32 use_clone_bugfix; /*for 4.5.0, cloning of physical memory does not work*/ 101 uint32 * clone_bugfix_regs; 102 103 /*memory mappings*/ 104 area_id regs_area; /* Kernel's area_id for the memory mapped registers. 105 It will be cloned into the accelerant's address 106 space. */ 107 108 area_id fb_area; /* Frame buffer's area_id. The addresses are shared with all teams. */ 109 area_id pseudo_dma_area; /* Pseudo dma area_id. Shared by all teams. */ 110 area_id dma_buffer_area; /* Area assigned for dma*/ 111 112 void *framebuffer; /* As viewed from virtual memory */ 113 void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */ 114 115 void *pseudo_dma; /* As viewed from virtual memory */ 116 117 void *dma_buffer; /* buffer for dma*/ 118 void *dma_buffer_pci; /* buffer for dma - from PCI bus*/ 119 120 /*screenmode list*/ 121 area_id mode_area; /* Contains the list of display modes the driver supports */ 122 uint32 mode_count; /* Number of display modes in the list */ 123 124 /*flags - used by driver*/ 125 uint32 flags; 126 127 /*vblank semaphore*/ 128 sem_id vblank; /* The vertical blank semaphore. Ownership will be 129 transfered to the team opening the device first */ 130 /*cursor information*/ 131 struct { 132 uint16 hot_x; /* Cursor hot spot. The top left corner of the cursor */ 133 uint16 hot_y; /* is 0,0 */ 134 uint16 x; /* The location of the cursor hot spot on the */ 135 uint16 y; /* desktop */ 136 uint16 width; /* Width and height of the cursor shape (always 16!) */ 137 uint16 height; 138 bool is_visible; /* Is the cursor currently displayed? */ 139 bool dh_right; /* Is cursor on right side of stretched screen? */ 140 } cursor; 141 142 /*colour lookup table*/ 143 uint8 color_data[3 * 256]; /* Colour lookup table - as used by DAC */ 144 145 /*more display mode stuff*/ 146 display_mode dm; /* current display mode configuration: head1 */ 147 display_mode dm2; /* current display mode configuration: head2 */ 148 bool acc_mode; /* signals (non)accelerated mode */ 149 bool interlaced_tv_mode;/* signals interlaced CRTC TV output mode */ 150 151 /*frame buffer config - for BDirectScreen*/ 152 frame_buffer_config fbc; /* bytes_per_row and start of frame buffer: head1 */ 153 frame_buffer_config fbc2; /* bytes_per_row and start of frame buffer: head2 */ 154 155 /*acceleration engine*/ 156 struct { 157 uint32 count; /* last dwgsync slot used */ 158 uint32 last_idle; /* last dwgsync slot we *know* the engine was idle after */ 159 benaphore lock; /* for serializing access to the acceleration engine */ 160 } engine; 161 162 /* card info - information gathered from PINS (and other sources) */ 163 enum 164 { // card_type in order of date of NV chip design 165 NV04 = 0, 166 NV05, 167 NV05M64, 168 NV06, 169 NV10, 170 NV11, 171 NV11M, 172 NV15, 173 NV17, 174 NV17M, 175 NV18, 176 NV18M, 177 NV20, 178 NV25, 179 NV28, 180 NV30, 181 NV31, 182 NV34, 183 NV35, 184 NV36, 185 NV38, 186 G550//remove later on 187 }; 188 enum 189 { // card_arch in order of date of NV chip design 190 NV04A = 0, 191 NV10A, 192 NV20A, 193 NV30A 194 }; 195 enum 196 { // tvout_chip_type in order of capability (more or less) 197 NONE = 0, 198 CH7003, 199 CH7004, 200 CH7005, 201 CH7006, 202 CH7007, 203 CH7008, 204 SAA7102, 205 SAA7103, 206 SAA7104, 207 SAA7105, 208 BT868, 209 BT869, 210 CX25870, 211 CX25871, 212 NVIDIA 213 }; 214 215 struct 216 { 217 /* specialised registers for card initialisation read from NV BIOS (pins) */ 218 219 /* general card information */ 220 uint32 card_type; /* see card_type enum above */ 221 uint32 card_arch; /* see card_arch enum above */ 222 bool laptop; /* mobile chipset or not ('internal' flatpanel!) */ 223 bool slaved_tmds1; /* external TMDS encoder active on CRTC1 */ 224 bool slaved_tmds2; /* external TMDS encoder active on CRTC2 */ 225 bool master_tmds1; /* on die TMDS encoder active on CRTC1 */ 226 bool master_tmds2; /* on die TMDS encoder active on CRTC2 */ 227 bool tmds1_active; /* found panel on CRTC1 that is active */ 228 bool tmds2_active; /* found panel on CRTC2 that is active */ 229 uint16 panel1_width; /* native horizontal resolution for digital panels */ 230 uint16 panel1_height; /* navive vertical resolution for digital panels */ 231 float panel1_aspect; /* panel's aspect ratio */ 232 uint16 panel2_width; /* native horizontal resolution for digital panels */ 233 uint16 panel2_height; /* navive vertical resolution for digital panels */ 234 float panel2_aspect; /* panel's aspect ratio */ 235 uint32 tvout_chip_type; /* see tvchip_type enum above */ 236 status_t pins_status; /* B_OK if read correctly, B_ERROR if faked */ 237 238 /* PINS */ 239 float f_ref; /* PLL reference-oscillator frequency (Mhz) */ 240 uint32 max_system_vco; /* graphics engine PLL VCO limits (Mhz) */ 241 uint32 min_system_vco; 242 uint32 max_pixel_vco; /* dac1 PLL VCO limits (Mhz) */ 243 uint32 min_pixel_vco; 244 uint32 max_video_vco; /* dac2, maven PLL VCO limits (Mhz) */ 245 uint32 min_video_vco; 246 uint32 std_engine_clock; /* graphics engine clock speed needed (Mhz) */ 247 uint32 std_memory_clock; /* card memory clock speed needed (Mhz) */ 248 uint32 max_dac1_clock; /* dac1 limits (Mhz) */ 249 uint32 max_dac1_clock_8; /* dac1 limits correlated to RAMspeed limits (Mhz) */ 250 uint32 max_dac1_clock_16; 251 uint32 max_dac1_clock_24; 252 uint32 max_dac1_clock_32; 253 uint32 max_dac1_clock_32dh; 254 uint32 max_dac2_clock; /* dac2 limits (Mhz) */ 255 uint32 max_dac2_clock_8; /* dac2, maven limits correlated to RAMspeed limits (Mhz) */ 256 uint32 max_dac2_clock_16; 257 uint32 max_dac2_clock_24; 258 uint32 max_dac2_clock_32; 259 uint32 max_dac2_clock_32dh; 260 bool secondary_head; /* presence of functions */ 261 bool tvout; 262 bool primary_dvi; 263 bool secondary_dvi; 264 uint32 memory_size; /* memory (Mb) */ 265 } ps; 266 267 /* mirror of the ROM (copied in driver, because may not be mapped permanently - only over fb) */ 268 uint8 rom_mirror[32768]; 269 270 /* some configuration settings from ~/config/settings/kernel/drivers/nv.settings if exists */ 271 settings settings; 272 273 struct 274 { 275 overlay_buffer myBuffer[MAXBUFFERS];/* scaler input buffers */ 276 int_buf_info myBufInfo[MAXBUFFERS]; /* extra info on scaler input buffers */ 277 overlay_token myToken; /* scaler is free/in use */ 278 benaphore lock; /* for creating buffers and aquiring overlay unit routines */ 279 uint8 crtc; /* location of overlay unit */ 280 } overlay; 281 282 } shared_info; 283 284 /* Read or write a value in PCI configuration space */ 285 typedef struct { 286 uint32 magic; /* magic number to make sure the caller groks us */ 287 uint32 offset; /* Offset to read/write */ 288 uint32 size; /* Number of bytes to transfer */ 289 uint32 value; /* The value read or written */ 290 } nv_get_set_pci; 291 292 /* Set some boolean condition (like enabling or disabling interrupts) */ 293 typedef struct { 294 uint32 magic; /* magic number to make sure the caller groks us */ 295 bool do_it; /* state to set */ 296 } nv_set_bool_state; 297 298 /* Retrieve the area_id of the kernel/accelerant shared info */ 299 typedef struct { 300 uint32 magic; /* magic number to make sure the caller groks us */ 301 area_id shared_info_area; /* area_id containing the shared information */ 302 } nv_get_private_data; 303 304 /* Retrieve the device name. Usefull for when we have a file handle, but want 305 to know the device name (like when we are cloning the accelerant) */ 306 typedef struct { 307 uint32 magic; /* magic number to make sure the caller groks us */ 308 char *name; /* The name of the device, less the /dev root */ 309 } nv_device_name; 310 311 enum { 312 313 _WAIT_FOR_VBLANK = (1 << 0) 314 }; 315 316 #if defined(__cplusplus) 317 } 318 #endif 319 320 321 #endif 322