1 /* 2 Copyright 1999, Be Incorporated. All Rights Reserved. 3 This file may be used under the terms of the Be Sample Code License. 4 5 Other authors: 6 Rudolf Cornelissen 4/2003-11/2004 7 */ 8 9 #ifndef DRIVERINTERFACE_H 10 #define DRIVERINTERFACE_H 11 12 #include <Accelerant.h> 13 #include "video_overlay.h" 14 #include <Drivers.h> 15 #include <PCI.h> 16 #include <OS.h> 17 18 #define DRIVER_PREFIX "nm" // apsed 19 20 /* 21 Internal driver state (also for sharing info between driver and accelerant) 22 */ 23 #if defined(__cplusplus) 24 extern "C" { 25 #endif 26 27 typedef struct { 28 sem_id sem; 29 int32 ben; 30 } benaphore; 31 32 #define INIT_BEN(x) x.sem = create_sem(0, "NM "#x" benaphore"); x.ben = 0; 33 #define AQUIRE_BEN(x) if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem); 34 #define RELEASE_BEN(x) if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem); 35 #define DELETE_BEN(x) delete_sem(x.sem); 36 37 38 #define NM_PRIVATE_DATA_MAGIC 0x0009 /* a private driver rev, of sorts */ 39 40 /*dualhead extensions to flags*/ 41 #define DUALHEAD_OFF (0<<6) 42 #define DUALHEAD_CLONE (1<<6) 43 #define DUALHEAD_ON (2<<6) 44 #define DUALHEAD_SWITCH (3<<6) 45 #define DUALHEAD_BITS (3<<6) 46 #define DUALHEAD_CAPABLE (1<<8) 47 #define TV_BITS (3<<9) 48 #define TV_MON (0<<9 49 #define TV_PAL (1<<9) 50 #define TV_NTSC (2<<9) 51 #define TV_CAPABLE (1<<11) 52 53 #define SKD_MOVE_CURSOR 0x00000001 54 #define SKD_PROGRAM_CLUT 0x00000002 55 #define SKD_SET_START_ADDR 0x00000004 56 #define SKD_SET_CURSOR 0x00000008 57 #define SKD_HANDLER_INSTALLED 0x80000000 58 59 enum { 60 NM_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1, 61 NM_GET_PCI, 62 NM_SET_PCI, 63 NM_DEVICE_NAME, 64 NM_RUN_INTERRUPTS, 65 NM_ISA_OUT, 66 NM_ISA_IN, 67 NM_PGM_BES 68 }; 69 70 /* max. number of overlay buffers */ 71 #define MAXBUFFERS 3 72 73 /* internal used info on overlay buffers */ 74 typedef struct 75 { 76 uint16 slopspace; 77 uint32 size; 78 } int_buf_info; 79 80 typedef struct settings { // apsed, see comments in nm.settings 81 // for driver 82 char accelerant[B_FILE_NAME_LENGTH]; 83 bool dumprom; 84 // for accelerant 85 uint32 logmask; 86 uint32 memory; 87 bool usebios; 88 bool hardcursor; 89 } settings; 90 91 /*shared info*/ 92 typedef struct { 93 /*a few ID things*/ 94 uint16 vendor_id; /* PCI vendor ID, from pci_info */ 95 uint16 device_id; /* PCI device ID, from pci_info */ 96 uint8 revision; /* PCI device revsion, from pci_info */ 97 98 /* bug workaround for 4.5.0 */ 99 uint32 use_clone_bugfix; /*for 4.5.0, cloning of physical memory does not work*/ 100 uint32 * clone_bugfix_regs; 101 uint32 * clone_bugfix_regs2; 102 103 /* old cards have their registers mapped inside the framebuffer area */ 104 bool regs_in_fb; 105 106 /*memory mappings*/ 107 area_id regs_area, regs2_area; /* Kernel's area_id for the memory mapped registers. 108 It will be cloned into the accelerant's address 109 space. */ 110 111 area_id fb_area; /* Frame buffer's area_id. The addresses are shared with all teams. */ 112 area_id pseudo_dma_area; /* Pseudo dma area_id. Shared by all teams. */ 113 area_id dma_buffer_area; /* Area assigned for dma*/ 114 115 void *framebuffer; /* As viewed from virtual memory */ 116 void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */ 117 118 void *pseudo_dma; /* As viewed from virtual memory */ 119 120 void *dma_buffer; /* buffer for dma*/ 121 void *dma_buffer_pci; /* buffer for dma - from PCI bus*/ 122 123 /*screenmode list*/ 124 area_id mode_area; /* Contains the list of display modes the driver supports */ 125 uint32 mode_count; /* Number of display modes in the list */ 126 127 /*flags - used by driver*/ 128 uint32 flags; 129 130 /*vblank semaphore*/ 131 sem_id vblank; /* The vertical blank semaphore. Ownership will be 132 transfered to the team opening the device first */ 133 /*cursor information*/ 134 struct { 135 uint16 hot_x; /* Cursor hot spot. The top left corner of the cursor */ 136 uint16 hot_y; /* is 0,0 */ 137 uint16 x; /* The location of the cursor hot spot on the */ 138 uint16 y; /* desktop */ 139 uint16 width; /* Width and height of the cursor shape (always 16!) */ 140 uint16 height; 141 bool is_visible; /* Is the cursor currently displayed? */ 142 } cursor; 143 144 /*colour lookup table*/ 145 uint8 color_data[3 * 256]; /* Colour lookup table - as used by DAC */ 146 147 /*more display mode stuff*/ 148 display_mode dm; /* current display mode configuration: head1 */ 149 bool acc_mode; /* signals (non)accelerated mode */ 150 151 /*frame buffer config - for BDirectScreen*/ 152 frame_buffer_config fbc; /* bytes_per_row and start of frame buffer: head1 */ 153 154 /*acceleration engine*/ 155 struct { 156 uint32 count; /* last dwgsync slot used */ 157 uint32 last_idle; /* last dwgsync slot we *know* the engine was idle after */ 158 benaphore lock; /* for serializing access to the acceleration engine */ 159 uint32 control; /* colordepth, memory pitch and other config stuff */ 160 uint8 depth; /* bytes per pixel used */ 161 } engine; 162 163 /* card info - information gathered from PINS (and other sources) */ 164 enum 165 { // card_type in order of date of nm chip design 166 NM2070 = 0, 167 NM2090, 168 NM2093, 169 NM2097, 170 NM2160, 171 NM2200, 172 NM2230, 173 NM2360, 174 NM2380 175 }; 176 struct 177 { 178 /* specialised registers for predefined cardspecs */ 179 180 /* general card information */ 181 uint32 card_type; /* see card_type enum above */ 182 183 /* PINS */ 184 float f_ref; /* PLL reference-oscillator frequency (Mhz) */ 185 uint32 max_system_vco; /* graphics engine PLL VCO limits (Mhz) */ 186 uint32 min_system_vco; 187 uint32 max_pixel_vco; /* dac1 PLL VCO limits (Mhz) */ 188 uint32 min_pixel_vco; 189 uint32 std_engine_clock; /* graphics engine clock speed needed (Mhz) */ 190 uint32 max_dac1_clock; /* dac1 limits (Mhz) */ 191 uint32 max_dac1_clock_8; /* dac1 limits correlated to RAMspeed limits (Mhz) */ 192 uint32 max_dac1_clock_16; 193 uint32 max_dac1_clock_24; 194 uint32 memory_size; /* memory (Kbytes) */ 195 uint32 curmem_size; /* memory (bytes) */ 196 uint16 max_crtc_width; /* CRTC max constraints */ 197 uint16 max_crtc_height; 198 uint8 panel_type; /* panel type */ 199 uint16 panel_width; /* panel size */ 200 uint16 panel_height; 201 uint8 outputs; /* in BIOS preselected output(s) */ 202 } ps; 203 204 /*mirror of the ROM (copied in driver, because may not be mapped permanently - only over fb)*/ 205 uint8 rom_mirror[65536]; 206 207 /* apsed: some configuration settings from ~/config/settings/kernel/drivers/nm.settings if exists */ 208 settings settings; 209 210 struct 211 { 212 overlay_buffer myBuffer[MAXBUFFERS];/* scaler input buffers */ 213 int_buf_info myBufInfo[MAXBUFFERS]; /* extra info on scaler input buffers */ 214 overlay_token myToken; /* scaler is free/in use */ 215 benaphore lock; /* for creating buffers and aquiring overlay unit routines */ 216 /* variables needed for virtualscreens (move_overlay()): */ 217 bool active; /* true is overlay currently in use */ 218 overlay_window ow; /* current position of overlay output window */ 219 overlay_buffer ob; /* current inputbuffer in use */ 220 overlay_view my_ov; /* current corrected view in inputbuffer */ 221 uint32 h_ifactor; /* current 'unclipped' horizontal inverse scaling factor */ 222 uint32 v_ifactor; /* current 'unclipped' vertical inverse scaling factor */ 223 } overlay; 224 } shared_info; 225 226 /* Read or write a value in PCI configuration space */ 227 typedef struct { 228 uint32 magic; /* magic number to make sure the caller groks us */ 229 uint32 offset; /* Offset to read/write */ 230 uint32 size; /* Number of bytes to transfer */ 231 uint32 value; /* The value read or written */ 232 } nm_get_set_pci; 233 234 /* Read or write a value in ISA I/O space */ 235 typedef struct { 236 uint32 magic; /* magic number to make sure the caller groks us */ 237 uint16 adress; /* Offset to read/write */ 238 uint8 size; /* Number of bytes to transfer */ 239 uint16 data; /* The value read or written */ 240 } nm_in_out_isa; 241 242 /* move_overlay related info */ 243 typedef struct { 244 uint32 hcoordv; /* left and right edges of video output window */ 245 uint32 vcoordv; /* top and bottom edges of video output window */ 246 uint32 hsrcendv; /* horizontal source end in source buffer (clipping) */ 247 uint32 a1orgv; /* vertical source clipping via startadress of source buffer */ 248 } move_overlay_info; 249 250 /* setup ISA BES registers for overlay on ISA cards */ 251 typedef struct { 252 uint32 magic; /* magic number to make sure the caller groks us */ 253 uint32 card_type; /* see card_type enum above */ 254 uint32 hiscalv; 255 uint32 viscalv; 256 uint32 globctlv; 257 uint32 weight; 258 uint8 colkey_r; 259 uint8 colkey_g; 260 uint8 colkey_b; 261 uint16 ob_width; 262 move_overlay_info moi; 263 bool move_only; 264 } nm_bes_data; 265 266 /* Set some boolean condition (like enabling or disabling interrupts) */ 267 typedef struct { 268 uint32 magic; /* magic number to make sure the caller groks us */ 269 bool do_it; /* state to set */ 270 } nm_set_bool_state; 271 272 /* Retrieve the area_id of the kernel/accelerant shared info */ 273 typedef struct { 274 uint32 magic; /* magic number to make sure the caller groks us */ 275 area_id shared_info_area; /* area_id containing the shared information */ 276 } nm_get_private_data; 277 278 /* Retrieve the device name. Usefull for when we have a file handle, but want 279 to know the device name (like when we are cloning the accelerant) */ 280 typedef struct { 281 uint32 magic; /* magic number to make sure the caller groks us */ 282 char *name; /* The name of the device, less the /dev root */ 283 } nm_device_name; 284 285 enum { 286 287 _WAIT_FOR_VBLANK = (1 << 0) 288 }; 289 290 #if defined(__cplusplus) 291 } 292 #endif 293 294 295 #endif 296