xref: /haiku/headers/private/graphics/common/edid_raw.h (revision 1214ef1b2100f2b3299fc9d8d6142e46f70a4c3f)
1 /*
2  * Copyright 2003, Thomas Kurschel. All Rights Reserved.
3  * Distributed under the terms of the MIT License.
4  */
5 #ifndef _EDID_RAW_H
6 #define _EDID_RAW_H
7 
8 
9 #include "bendian_bitfield.h"
10 
11 
12 /*!	Raw EDID data block.
13 
14 	Raw data are packed in a really weird way. Never even
15 	think about using it directly, instead translate it via decode_edid()
16 	first.
17 */
18 
19 #define EDID1_NUM_DETAILED_MONITOR_DESC 4
20 #define EDID1_NUM_STD_TIMING 8
21 #define EDID1_NUM_EXTRA_STD_TIMING 6
22 #define EDID1_EXTRA_STRING_LEN 13
23 #define EDID1_NUM_EXTRA_WHITEPOINTS 2
24 
25 
26 // header
27 typedef struct _PACKED {
28 	int8 pad[8];		// contains 0, -1, -1, -1, -1, -1, -1, 0
29 } edid1_header_raw;
30 
31 
32 // vendor info
33 typedef struct _PACKED {
34 	BBITFIELD8_3 (		// manufacturer
35 		pad : 1,
36 		c1 : 5,			// add '@' to get ascii
37 		c2_high : 2
38 	);
39 	BBITFIELD8_2 (
40 		c2_low : 3,
41 		c3 : 5
42 	);
43 	uint16 prod_id;
44 	uint32 serial;
45 	uint8 week;
46 	uint8 year;			// x+1990
47 } edid1_vendor_raw;
48 
49 
50 // version info
51 typedef struct _PACKED {
52 	uint8 version;
53 	uint8 revision;
54 } edid1_version_raw;
55 
56 
57 // display info
58 typedef struct _PACKED {
59 	BBITFIELD8_7 (
60 		input_type : 1,		// 1 : digital
61 		input_voltage : 2,	// 0=0.7V/0.3V, 1=0.714V/0.286,
62 							// 2=1V/0.4V, 3=0.7V/0V
63 		setup : 1,			// true if voltage configurable
64 		sep_sync : 1,
65 		comp_sync : 1,
66 		sync_on_green : 1,
67 		sync_serr : 1
68 	);
69 	uint8 h_size;
70 	uint8 v_size;
71 	uint8 gamma;	// (x+100)/100
72 	BBITFIELD8_7 (
73 		dpms_standby : 1,
74 		dpms_suspend : 1,
75 		dpms_off : 1,
76 		display_type : 2,	// 0=mono, 1=rgb, 2=multicolour
77 		// since EDID version 1.1
78 		std_colour_space : 1,
79 		preferred_timing_mode : 1,
80 		gtf_supported : 1
81 	);
82 	BBITFIELD8_4 (		// low bits of red_x etc.
83 		red_x_low : 2,
84 		red_y_low : 2,
85 		green_x_low : 2,
86 		green_y_low : 2
87 	);
88 	BBITFIELD8_4 (
89 		blue_x_low : 2,
90 		blue_y_low : 2,
91 		white_x_low : 2,
92 		white_y_low : 2
93 	);
94 	uint8 red_x;		// all colours are 0.10 fixed point
95 	uint8 red_y;
96 	uint8 green_x;
97 	uint8 green_y;
98 	uint8 blue_x;
99 	uint8 blue_y;
100 	uint8 white_x;
101 	uint8 white_y;
102 } edid1_display_raw;
103 
104 
105 // raw standard timing data
106 typedef union _PACKED {
107 	struct _PACKED {
108 		uint8 h_size;		// (x+31)*8
109 		BBITFIELD8_2 (
110 			ratio : 2,		// 0=1:1, 1=3/4, 2=4/5, 3=9/16
111 			refresh : 6		// (x+60)
112 		);
113 	} timing;
114 	uint16 id;
115 } edid1_std_timing_raw;
116 
117 
118 // list of supported fixed timings
119 typedef struct _PACKED {
120 	BBITFIELD8_8 (
121 		res_720x400x70 : 1,
122 		res_720x400x88 : 1,
123 		res_640x480x60 : 1,
124 		res_640x480x67 : 1,
125 		res_640x480x72 : 1,
126 		res_640x480x75 : 1,
127 		res_800x600x56 : 1,
128 		res_800x600x60 : 1
129 	);
130 	BBITFIELD8_8 (
131 		res_800x600x72 : 1,
132 		res_800x600x75 : 1,
133 		res_832x624x75 : 1,
134 		res_1024x768x87i : 1,
135 		res_1024x768x60 : 1,
136 		res_1024x768x70 : 1,
137 		res_1024x768x75 : 1,
138 		res_1280x1024x75 : 1
139 	);
140 	BBITFIELD8_2 (
141 		res_1152x870x75 : 1,
142 		pad : 7
143 	);
144 } edid1_established_timing;
145 
146 
147 // types of detailed monitor description
148 enum {
149 	EDID1_SERIAL_NUMBER = 0xff,
150 	EDID1_ASCII_DATA = 0xfe,
151 	EDID1_MONITOR_RANGES = 0xfd,
152 	EDID1_MONITOR_NAME = 0xfc,
153 	EDID1_ADD_COLOUR_POINTER = 0xfb,
154 	EDID1_ADD_STD_TIMING = 0xfa,
155 	EDID1_IS_DETAILED_TIMING = 1
156 };
157 
158 
159 // monitor frequency range
160 typedef struct _PACKED {
161 	uint8 min_v;
162 	uint8 max_v;
163 	uint8 min_h;
164 	uint8 max_h;
165 	uint8 max_clock;	// in 10 MHz (!)
166 } edid1_monitor_range;
167 
168 
169 // additional whitepoint
170 typedef struct _PACKED {
171 	uint8 index1;
172 	BBITFIELD8_3 (
173 		pad1 : 4,
174 		white_x1_low : 2,
175 		white_y1_low : 2
176 	);
177 	uint8 white_x1;
178 	uint8 white_y1;
179 	uint8 gamma1;	// (x+100)/100
180 	uint8 index2;
181 	BBITFIELD8_3 (
182 		pad2 : 4,
183 		white_x2_low : 2,
184 		white_y2_low : 2
185 	);
186 	uint8 white_x2;
187 	uint8 white_y2;
188 	uint8 gamma2;	// (x+100)/100
189 } edid1_whitepoint_raw;
190 
191 
192 // detailed timing description
193 typedef struct _PACKED {
194 	uint16 pixel_clock; // in 10 kHz (!)
195 	uint8 h_active;
196 	uint8 h_blank;
197 	BBITFIELD8_2 (
198 		h_active_high : 4,
199 		h_blank_high : 4
200 	);
201 	uint8 v_active;
202 	uint8 v_blank;
203 	BBITFIELD8_2 (
204 		v_active_high : 4,
205 		v_blank_high : 4
206 	);
207 	uint8 h_sync_off;
208 	uint8 h_sync_width;
209 	BBITFIELD8_2 (
210 		v_sync_off : 4,
211 		v_sync_width : 4
212 	);
213 	BBITFIELD8_4 (
214 		h_sync_off_high : 2,
215 		h_sync_width_high : 2,
216 		v_sync_off_high : 2,
217 		v_sync_width_high : 2
218 	);
219 	uint8 h_size;
220 	uint8 v_size;
221 	BBITFIELD8_2 (
222 		h_size_high : 4,
223 		v_size_high : 4
224 	);
225 	uint8 h_border;
226 	uint8 v_border;
227 	BBITFIELD8_4 (
228 		interlaced : 1,
229 		stereo : 2,		// upper bit set - left on sync
230 						// lower bit set - right on sync
231 		sync : 2,
232 		misc : 2
233 	);
234 } edid1_detailed_timing_raw;
235 
236 
237 // detailed monitor description
238 typedef union _PACKED {
239 	edid1_detailed_timing_raw detailed_timing;
240 	struct _PACKED {
241 		uint8 zero_0[3];
242 		uint8 monitor_desc_type;
243 		uint8 zero_4;
244 		union _PACKED {
245 			uint8 serial_number[EDID1_EXTRA_STRING_LEN];
246 			uint8 ascii_data[EDID1_EXTRA_STRING_LEN];
247 			uint8 monitor_name[EDID1_EXTRA_STRING_LEN];
248 			edid1_monitor_range monitor_range;
249 			edid1_whitepoint_raw whitepoint;
250 			edid1_std_timing_raw std_timing[EDID1_NUM_EXTRA_STD_TIMING];
251 		} data;
252 	} extra;
253 } edid1_detailed_monitor_raw;
254 
255 
256 // raw EDID data
257 // everything is packed data, mixture of little endian and big endian
258 // and a bit brain dead overall - nothing your dad would be proud of
259 typedef struct _PACKED {
260 	edid1_header_raw header; 						// 8 bytes
261 	edid1_vendor_raw vendor;						// 10 bytes
262 	edid1_version_raw version;						// 2 bytes
263 	edid1_display_raw display;						// 15 bytes
264 	edid1_established_timing established_timing;	// 3 bytes
265 	edid1_std_timing_raw std_timing[EDID1_NUM_STD_TIMING];
266 													// 8 a 2 bytes -> 16 bytes
267 
268 	// since EDID version 1.2
269 	edid1_detailed_monitor_raw detailed_monitor[EDID1_NUM_DETAILED_MONITOR_DESC];
270 													// 4 a 18 bytes -> 72 bytes
271 
272 	uint8 num_sections; 							// 1 byte
273 	uint8 check_sum;								// 1 byte
274 } edid1_raw;										// total: 128 bytes
275 
276 #endif
277