xref: /haiku/headers/private/graphics/3dfx/DriverInterface.h (revision 820dca4df6c7bf955c46e8f6521b9408f50b2900)
1 /*
2  * Copyright 2007-2010 Haiku, Inc.  All rights reserved.
3  * Distributed under the terms of the MIT license.
4  *
5  * Authors:
6  *		Gerald Zajac
7  */
8 
9 #ifndef DRIVERINTERFACE_H
10 #define DRIVERINTERFACE_H
11 
12 
13 #include <Accelerant.h>
14 #include <GraphicsDefs.h>
15 #include <Drivers.h>
16 #include <edid.h>
17 #include <video_overlay.h>
18 
19 
20 // This file contains info that is shared between the kernel driver and the
21 // accelerant, and info that is shared among the source files of the accelerant.
22 
23 
24 #define ENABLE_DEBUG_TRACE		// if defined, turns on debug output to syslog
25 
26 
27 #define ARRAY_SIZE(a) (int(sizeof(a) / sizeof(a[0]))) 	// get number of elements in an array
28 
29 
30 
31 struct Benaphore {
32 	sem_id	sem;
33 	int32	count;
34 
35 	status_t Init(const char* name)
36 	{
37 		count = 0;
38 		sem = create_sem(0, name);
39 		return sem < 0 ? sem : B_OK;
40 	}
41 
42 	status_t Acquire()
43 	{
44 		if (atomic_add(&count, 1) > 0)
45 			return acquire_sem(sem);
46 		return B_OK;
47 	}
48 
49 	status_t Release()
50 	{
51 		if (atomic_add(&count, -1) > 1)
52 			return release_sem(sem);
53 		return B_OK;
54 	}
55 
56 	void Delete()	{ delete_sem(sem); }
57 };
58 
59 
60 #define TDFX_PRIVATE_DATA_MAGIC	 0x5042
61 
62 
63 enum {
64 	TDFX_GET_SHARED_DATA = B_DEVICE_OP_CODES_END + 123,
65 	TDFX_DEVICE_NAME,
66 	TDFX_GET_PIO_REG,
67 	TDFX_SET_PIO_REG
68 };
69 
70 
71 // Chip type numbers.  These are used to group the chips into related
72 // groups.	See table chipTable in driver.c
73 
74 enum ChipType {
75 	TDFX_NONE = 0,
76 
77 	BANSHEE,
78 	VOODOO_3,
79 	VOODOO_5,
80 };
81 
82 
83 struct PIORegInfo {
84 	uint32	magic;	// magic number
85 	uint32	offset;	// offset of register in PIO register area
86 	int16	index;	// index of value to read/write; < 0 if not indexed reg
87 	uint8	value;	// value to write or value that was read
88 };
89 
90 
91 struct DisplayModeEx : display_mode {
92 	uint8	bitsPerPixel;
93 	uint8	bytesPerPixel;
94 	uint16	bytesPerRow;		// number of bytes in one line/row
95 };
96 
97 
98 struct OverlayBuffer : overlay_buffer {
99 	OverlayBuffer*	nextBuffer;	// pointer to next buffer in chain, NULL = none
100 	uint32			size;		// size of overlay buffer
101 };
102 
103 
104 struct SharedInfo {
105 	// Device ID info.
106 	uint16	vendorID;			// PCI vendor ID, from pci_info
107 	uint16	deviceID;			// PCI device ID, from pci_info
108 	uint8	revision;			// PCI device revsion, from pci_info
109 	ChipType chipType;			// indicates group in which chip belongs (a group has similar functionality)
110 	char	chipName[32];		// user recognizable name of chip
111 
112 	bool	bAccelerantInUse;	// true = accelerant has been initialized
113 
114 	// Memory mappings.
115 	area_id regsArea;			// area_id for the memory mapped registers. It will
116 								// be cloned into accelerant's address space.
117 	area_id videoMemArea;		// video memory area_id.  The addresses are shared with all teams.
118 	addr_t	videoMemAddr;		// video memory addr as viewed from virtual memory
119 	phys_addr_t	videoMemPCI;	// video memory addr as viewed from the PCI bus (for DMA)
120 	uint32	videoMemSize; 		// video memory size in bytes.
121 
122 	uint32	cursorOffset;		// offset of cursor in video memory
123 	uint32	frameBufferOffset;	// offset of frame buffer in video memory
124 	uint32	maxFrameBufferSize;	// max available video memory for frame buffer
125 
126 	// Color spaces supported by current video chip/driver.
127 	color_space	colorSpaces[6];
128 	uint32	colorSpaceCount;	// number of color spaces in array colorSpaces
129 
130 	uint32 maxPixelClock;		// max pixel clock of current chip in KHz
131 
132 	// List of screen modes.
133 	area_id modeArea;			// area containing list of display modes the driver supports
134 	uint32	modeCount;			// number of display modes in the list
135 
136 	DisplayModeEx displayMode;	// current display mode configuration
137 
138 	uint16		cursorHotX;		// Cursor hot spot. Top left corner of the cursor
139 	uint16		cursorHotY;		// is 0,0
140 
141 	edid1_info	edidInfo;
142 	bool		bHaveEDID;		// true = EDID info from device is in edidInfo
143 
144 	Benaphore	engineLock;		// for access to the acceleration engine
145 	Benaphore	overlayLock;	// for overlay operations
146 
147 	int32		overlayAllocated;	// non-zero if overlay is allocated
148 	uint32		overlayToken;
149 	OverlayBuffer* overlayBuffer;	// pointer to linked list of buffers; NULL = none
150 };
151 
152 
153 #endif	// DRIVERINTERFACE_H
154