xref: /haiku/headers/private/graphics/3dfx/DriverInterface.h (revision 4bd0c1066b227cec4b79883bdef697c7a27f2e90)
1 /*
2  * Copyright 2007-2010 Haiku, Inc.  All rights reserved.
3  * Distributed under the terms of the MIT license.
4  *
5  * Authors:
6  *		Gerald Zajac
7  */
8 
9 #ifndef DRIVERINTERFACE_H
10 #define DRIVERINTERFACE_H
11 
12 
13 #include <Accelerant.h>
14 #include <GraphicsDefs.h>
15 #include <Drivers.h>
16 #include <edid.h>
17 #include <video_overlay.h>
18 
19 
20 // This file contains info that is shared between the kernel driver and the
21 // accelerant, and info that is shared among the source files of the accelerant.
22 
23 
24 #define ENABLE_DEBUG_TRACE		// if defined, turns on debug output to syslog
25 
26 
27 struct Benaphore {
28 	sem_id	sem;
29 	int32	count;
30 
31 	status_t Init(const char* name)
32 	{
33 		count = 0;
34 		sem = create_sem(0, name);
35 		return sem < 0 ? sem : B_OK;
36 	}
37 
38 	status_t Acquire()
39 	{
40 		if (atomic_add(&count, 1) > 0)
41 			return acquire_sem(sem);
42 		return B_OK;
43 	}
44 
45 	status_t Release()
46 	{
47 		if (atomic_add(&count, -1) > 1)
48 			return release_sem(sem);
49 		return B_OK;
50 	}
51 
52 	void Delete()	{ delete_sem(sem); }
53 };
54 
55 
56 #define TDFX_PRIVATE_DATA_MAGIC	 0x5042
57 
58 
59 enum {
60 	TDFX_GET_SHARED_DATA = B_DEVICE_OP_CODES_END + 123,
61 	TDFX_DEVICE_NAME,
62 	TDFX_GET_PIO_REG,
63 	TDFX_SET_PIO_REG
64 };
65 
66 
67 // Chip type numbers.  These are used to group the chips into related
68 // groups.	See table chipTable in driver.c
69 
70 enum ChipType {
71 	TDFX_NONE = 0,
72 
73 	BANSHEE,
74 	VOODOO_3,
75 	VOODOO_5,
76 };
77 
78 
79 struct PIORegInfo {
80 	uint32	magic;	// magic number
81 	uint32	offset;	// offset of register in PIO register area
82 	int16	index;	// index of value to read/write; < 0 if not indexed reg
83 	uint8	value;	// value to write or value that was read
84 };
85 
86 
87 struct DisplayModeEx : display_mode {
88 	uint8	bitsPerPixel;
89 	uint8	bytesPerPixel;
90 	uint16	bytesPerRow;		// number of bytes in one line/row
91 };
92 
93 
94 struct OverlayBuffer : overlay_buffer {
95 	OverlayBuffer*	nextBuffer;	// pointer to next buffer in chain, NULL = none
96 	uint32			size;		// size of overlay buffer
97 };
98 
99 
100 struct SharedInfo {
101 	// Device ID info.
102 	uint16	vendorID;			// PCI vendor ID, from pci_info
103 	uint16	deviceID;			// PCI device ID, from pci_info
104 	uint8	revision;			// PCI device revsion, from pci_info
105 	ChipType chipType;			// indicates group in which chip belongs (a group has similar functionality)
106 	char	chipName[32];		// user recognizable name of chip
107 
108 	bool	bAccelerantInUse;	// true = accelerant has been initialized
109 
110 	// Memory mappings.
111 	area_id regsArea;			// area_id for the memory mapped registers. It will
112 								// be cloned into accelerant's address space.
113 	area_id videoMemArea;		// video memory area_id.  The addresses are shared with all teams.
114 	addr_t	videoMemAddr;		// video memory addr as viewed from virtual memory
115 	phys_addr_t	videoMemPCI;	// video memory addr as viewed from the PCI bus (for DMA)
116 	uint32	videoMemSize; 		// video memory size in bytes.
117 
118 	uint32	cursorOffset;		// offset of cursor in video memory
119 	uint32	frameBufferOffset;	// offset of frame buffer in video memory
120 	uint32	maxFrameBufferSize;	// max available video memory for frame buffer
121 
122 	// Color spaces supported by current video chip/driver.
123 	color_space	colorSpaces[6];
124 	uint32	colorSpaceCount;	// number of color spaces in array colorSpaces
125 
126 	uint32 maxPixelClock;		// max pixel clock of current chip in KHz
127 
128 	// List of screen modes.
129 	area_id modeArea;			// area containing list of display modes the driver supports
130 	uint32	modeCount;			// number of display modes in the list
131 
132 	DisplayModeEx displayMode;	// current display mode configuration
133 
134 	uint16		cursorHotX;		// Cursor hot spot. Top left corner of the cursor
135 	uint16		cursorHotY;		// is 0,0
136 
137 	edid1_info	edidInfo;
138 	bool		bHaveEDID;		// true = EDID info from device is in edidInfo
139 
140 	Benaphore	engineLock;		// for access to the acceleration engine
141 	Benaphore	overlayLock;	// for overlay operations
142 
143 	int32		overlayAllocated;	// non-zero if overlay is allocated
144 	uint32		overlayToken;
145 	OverlayBuffer* overlayBuffer;	// pointer to linked list of buffers; NULL = none
146 };
147 
148 
149 #endif	// DRIVERINTERFACE_H
150