xref: /haiku/headers/posix/arch/arm64/fenv.h (revision 5bd0fbd13a1e832f91643aaa921fbc0879abd518)
1 /*-
2  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef	_FENV_H_
30 #define	_FENV_H_
31 
32 #include <stdint.h>
33 #include <sys/cdefs.h>
34 #include <sys/types.h>
35 
36 #ifndef	__fenv_static
37 #define	__fenv_static	static
38 #endif
39 
40 typedef	uint64_t	fenv_t;
41 typedef	uint64_t	fexcept_t;
42 
43 /* Exception flags */
44 #define	FE_INVALID	0x00000001
45 #define	FE_DIVBYZERO	0x00000002
46 #define	FE_OVERFLOW	0x00000004
47 #define	FE_UNDERFLOW	0x00000008
48 #define	FE_INEXACT	0x00000010
49 #define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_INEXACT | \
50 			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
51 
52 /*
53  * Rounding modes
54  *
55  * We can't just use the hardware bit values here, because that would
56  * make FE_UPWARD and FE_DOWNWARD negative, which is not allowed.
57  */
58 #define	FE_TONEAREST	0x0
59 #define	FE_UPWARD	0x1
60 #define	FE_DOWNWARD	0x2
61 #define	FE_TOWARDZERO	0x3
62 #define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
63 			 FE_UPWARD | FE_TOWARDZERO)
64 #define	_ROUND_SHIFT	22
65 
66 __BEGIN_DECLS
67 
68 /* Default floating-point environment */
69 extern const fenv_t	__fe_dfl_env;
70 #define	FE_DFL_ENV	(&__fe_dfl_env)
71 
72 /* We need to be able to map status flag positions to mask flag positions */
73 #define _FPUSW_SHIFT	8
74 #define	_ENABLE_MASK	(FE_ALL_EXCEPT << _FPUSW_SHIFT)
75 
76 #define	__mrs_fpcr(__r)	__asm __volatile("mrs %0, fpcr" : "=r" (__r))
77 #define	__msr_fpcr(__r)	__asm __volatile("msr fpcr, %0" : : "r" (__r))
78 
79 #define	__mrs_fpsr(__r)	__asm __volatile("mrs %0, fpsr" : "=r" (__r))
80 #define	__msr_fpsr(__r)	__asm __volatile("msr fpsr, %0" : : "r" (__r))
81 
82 __fenv_static __inline int
83 feclearexcept(int __excepts)
84 {
85 	fexcept_t __r;
86 
87 	__mrs_fpsr(__r);
88 	__r &= ~__excepts;
89 	__msr_fpsr(__r);
90 	return (0);
91 }
92 
93 __fenv_static inline int
94 fegetexceptflag(fexcept_t *__flagp, int __excepts)
95 {
96 	fexcept_t __r;
97 
98 	__mrs_fpsr(__r);
99 	*__flagp = __r & __excepts;
100 	return (0);
101 }
102 
103 __fenv_static inline int
104 fesetexceptflag(const fexcept_t *__flagp, int __excepts)
105 {
106 	fexcept_t __r;
107 
108 	__mrs_fpsr(__r);
109 	__r &= ~__excepts;
110 	__r |= *__flagp & __excepts;
111 	__msr_fpsr(__r);
112 	return (0);
113 }
114 
115 __fenv_static inline int
116 feraiseexcept(int __excepts)
117 {
118 	fexcept_t __r;
119 
120 	__mrs_fpsr(__r);
121 	__r |= __excepts;
122 	__msr_fpsr(__r);
123 	return (0);
124 }
125 
126 __fenv_static inline int
127 fetestexcept(int __excepts)
128 {
129 	fexcept_t __r;
130 
131 	__mrs_fpsr(__r);
132 	return (__r & __excepts);
133 }
134 
135 __fenv_static inline int
136 fegetround(void)
137 {
138 	fenv_t __r;
139 
140 	__mrs_fpcr(__r);
141 	return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);
142 }
143 
144 __fenv_static inline int
145 fesetround(int __round)
146 {
147 	fenv_t __r;
148 
149 	if (__round & ~_ROUND_MASK)
150 		return (-1);
151 	__mrs_fpcr(__r);
152 	__r &= ~(_ROUND_MASK << _ROUND_SHIFT);
153 	__r |= __round << _ROUND_SHIFT;
154 	__msr_fpcr(__r);
155 	return (0);
156 }
157 
158 __fenv_static inline int
159 fegetenv(fenv_t *__envp)
160 {
161 	fenv_t __r;
162 
163 	__mrs_fpcr(__r);
164 	*__envp = __r & _ENABLE_MASK;
165 
166 	__mrs_fpsr(__r);
167 	*__envp |= __r & (FE_ALL_EXCEPT | (_ROUND_MASK << _ROUND_SHIFT));
168 
169 	return (0);
170 }
171 
172 __fenv_static inline int
173 feholdexcept(fenv_t *__envp)
174 {
175 	fenv_t __r;
176 
177 	__mrs_fpcr(__r);
178 	*__envp = __r & _ENABLE_MASK;
179 	__r &= ~(_ENABLE_MASK);
180 	__msr_fpcr(__r);
181 
182 	__mrs_fpsr(__r);
183 	*__envp |= __r & (FE_ALL_EXCEPT | (_ROUND_MASK << _ROUND_SHIFT));
184 	__r &= ~(_ENABLE_MASK);
185 	__msr_fpsr(__r);
186 	return (0);
187 }
188 
189 __fenv_static inline int
190 fesetenv(const fenv_t *__envp)
191 {
192 
193 	__msr_fpcr((*__envp) & _ENABLE_MASK);
194 	__msr_fpsr((*__envp) & (FE_ALL_EXCEPT | (_ROUND_MASK << _ROUND_SHIFT)));
195 	return (0);
196 }
197 
198 __fenv_static inline int
199 feupdateenv(const fenv_t *__envp)
200 {
201 	fexcept_t __r;
202 
203 	__mrs_fpsr(__r);
204 	fesetenv(__envp);
205 	feraiseexcept(__r & FE_ALL_EXCEPT);
206 	return (0);
207 }
208 
209 #if __BSD_VISIBLE
210 
211 /* We currently provide no external definitions of the functions below. */
212 
213 static inline int
214 feenableexcept(int __mask)
215 {
216 	fenv_t __old_r, __new_r;
217 
218 	__mrs_fpcr(__old_r);
219 	__new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
220 	__msr_fpcr(__new_r);
221 	return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
222 }
223 
224 static inline int
225 fedisableexcept(int __mask)
226 {
227 	fenv_t __old_r, __new_r;
228 
229 	__mrs_fpcr(__old_r);
230 	__new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
231 	__msr_fpcr(__new_r);
232 	return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
233 }
234 
235 static inline int
236 fegetexcept(void)
237 {
238 	fenv_t __r;
239 
240 	__mrs_fpcr(__r);
241 	return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
242 }
243 
244 #endif /* __BSD_VISIBLE */
245 
246 __END_DECLS
247 
248 #endif	/* !_FENV_H_ */
249