1 /* 2 * Copyright 2008, Haiku Inc. All rights reserved. 3 * Distributed under the terms of the MIT License. 4 */ 5 #ifndef _PCI2_H 6 #define _PCI2_H 7 8 9 #include <device_manager.h> 10 #include <PCI.h> 11 12 13 typedef struct pci_device pci_device; 14 15 typedef struct pci_device_module_info { 16 driver_module_info info; 17 18 uint8 (*read_io_8)(pci_device *device, addr_t mappedIOAddress); 19 void (*write_io_8)(pci_device *device, addr_t mappedIOAddress, 20 uint8 value); 21 uint16 (*read_io_16)(pci_device *device, addr_t mappedIOAddress); 22 void (*write_io_16)(pci_device *device, addr_t mappedIOAddress, 23 uint16 value); 24 uint32 (*read_io_32)(pci_device *device, addr_t mappedIOAddress); 25 void (*write_io_32)(pci_device *device, addr_t mappedIOAddress, 26 uint32 value); 27 28 phys_addr_t (*ram_address)(pci_device *device, phys_addr_t physicalAddress); 29 30 uint32 (*read_pci_config)(pci_device *device, uint16 offset, 31 uint8 size); 32 void (*write_pci_config)(pci_device *device, uint16 offset, 33 uint8 size, uint32 value); 34 status_t (*find_pci_capability)(pci_device *device, uint8 capID, 35 uint8 *offset); 36 void (*get_pci_info)(pci_device *device, struct pci_info *info); 37 status_t (*find_pci_extended_capability)(pci_device *device, uint16 capID, 38 uint16 *offset); 39 uint8 (*get_powerstate)(pci_device *device); 40 void (*set_powerstate)(pci_device *device, uint8 state); 41 42 // MSI/MSI-X 43 uint32 (*get_msi_count)(pci_device *device); 44 status_t (*configure_msi)(pci_device *device, 45 uint32 count, 46 uint32 *startVector); 47 status_t (*unconfigure_msi)(pci_device *device); 48 49 status_t (*enable_msi)(pci_device *device); 50 status_t (*disable_msi)(pci_device *device); 51 52 uint32 (*get_msix_count)(pci_device *device); 53 status_t (*configure_msix)(pci_device *device, 54 uint32 count, 55 uint32 *startVector); 56 status_t (*enable_msix)(pci_device *device); 57 58 } pci_device_module_info; 59 60 61 typedef struct pci_resource_range { 62 uint32 type; 63 uint8 address_type; 64 phys_addr_t host_address; 65 phys_addr_t pci_address; 66 uint64 size; 67 } pci_resource_range; 68 69 70 typedef struct pci_controller_module_info { 71 driver_module_info info; 72 73 // read PCI config space 74 status_t (*read_pci_config)(void *cookie, 75 uint8 bus, uint8 device, uint8 function, 76 uint16 offset, uint8 size, uint32 *value); 77 78 // write PCI config space 79 status_t (*write_pci_config)(void *cookie, 80 uint8 bus, uint8 device, uint8 function, 81 uint16 offset, uint8 size, uint32 value); 82 83 status_t (*get_max_bus_devices)(void *cookie, int32 *count); 84 85 status_t (*read_pci_irq)(void *cookie, 86 uint8 bus, uint8 device, uint8 function, 87 uint8 pin, uint8 *irq); 88 89 status_t (*write_pci_irq)(void *cookie, 90 uint8 bus, uint8 device, uint8 function, 91 uint8 pin, uint8 irq); 92 93 status_t (*get_range)(void *cookie, uint32 index, pci_resource_range *range); 94 95 status_t (*finalize)(void *cookie); 96 97 } pci_controller_module_info; 98 99 100 /* Attributes of PCI device nodes */ 101 #define B_PCI_DEVICE_DOMAIN "pci/domain" /* uint32 */ 102 #define B_PCI_DEVICE_BUS "pci/bus" /* uint8 */ 103 #define B_PCI_DEVICE_DEVICE "pci/device" /* uint8 */ 104 #define B_PCI_DEVICE_FUNCTION "pci/function" /* uint8 */ 105 106 #endif /* _PCI2_H */ 107