xref: /haiku/docs/develop/kernel/arch/long_double.rst (revision 3d4afef9cba2f328e238089d4609d00d4b1524f3)
1Notes on long double support
2============================
3
4The “long double” type is different on each architecture. Depending on
5the available hardware and ABI conventions, performance compromises,
6etc, there may be many implementations of it. Here is a summary for our
7convenience.
8
9128-bit IEEE
10------------
11
12Platforms: Sparc, ARM64, RISC-V
13
14This is the standard long double type from IEEE754. It has 1 sign bit,
1515 exponent bit, and 112 fractional part bits. It is the natural
16extension of the 64bit double.
17
18Sparc specifies this type in their ABI but no implementation actually
19has the instructions, they instead trigger a trap which would software
20emulate them. However, gcc short circuits this by default and calls C
21library support functions directly.
22
23.. _bit-ieee-1:
24
2564-bit IEEE
26-----------
27
28Platforms: ARM
29
30This is the same representation as plain “double”. ARM uses this for
31simplicity.
32
3380-bit
34------
35
36Platform: x86, x86_64, m68k
37
38This intermediate format is used by x86 CPUs internally. It may end up
39being faster than plain double there. It consists of a 64bit fractional
40part, 15 exponent bits, and 1 sign bit. This is convenient because the
41fractional part is a relatively easy to handle 64bit number.
42
43m68k uses a similar format, but padded to 96 bits (the extra 16 bits are
44unused).
45
46double double
47-------------
48
49Platforms: PowerPC?
50
51This is also a 128bit type, but the representation is just two 64bit
52doubles. The value is the sum of the two halves. This format allows
53faster emulation than a “true” 128bit long double, and the precision is
54almost as good.
55