Searched refs:CIPHY_MII_10BTCSR (Results 1 – 6 of 6) sorted by relevance
| /haiku/src/add-ons/kernel/drivers/network/ether/vt612x/dev/mii/ |
| H A D | ciphy.c | 314 val = PHY_READ(sc, CIPHY_MII_10BTCSR); in ciphy_fixup()
316 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 225 #define CIPHY_MII_10BTCSR 0x16 macro
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| /haiku/src/add-ons/kernel/drivers/network/ether/nforce/dev/mii/ |
| H A D | ciphy.c | 314 val = PHY_READ(sc, CIPHY_MII_10BTCSR); in ciphy_fixup()
316 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 225 #define CIPHY_MII_10BTCSR 0x16 macro
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| /haiku/src/add-ons/kernel/drivers/network/ether/via_rhine/dev/mii/ |
| H A D | ciphy.c | 314 val = PHY_READ(sc, CIPHY_MII_10BTCSR); in ciphy_fixup()
316 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 225 #define CIPHY_MII_10BTCSR 0x16 macro
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