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Searched refs:AR_PHY_65NM_CH0_RXTX2 (Results 1 – 4 of 4) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_tx99_tgt.c171 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_tgt_set_single_carrier()
193 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_tgt_set_single_carrier()
288 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_tgt_set_single_carrier()
353 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_tgt_set_single_carrier()
423 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_tgt_set_single_carrier()
H A Dar9300_misc.c3452 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, in ar9300_tx99_set_single_carrier()
3453 OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) | (0x1 << 3) | (0x1 << 2)); in ar9300_tx99_set_single_carrier()
3477 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, in ar9300_tx99_set_single_carrier()
3478 (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_set_single_carrier()
3585 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, in ar9300_tx99_set_single_carrier()
3586 (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_set_single_carrier()
3662 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, in ar9300_tx99_set_single_carrier()
3663 (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_set_single_carrier()
3745 OS_REG_WRITE(ah, AR_PHY_65NM_CH0_RXTX2, in ar9300_tx99_set_single_carrier()
3746 (OS_REG_READ(ah, AR_PHY_65NM_CH0_RXTX2) in ar9300_tx99_set_single_carrier()
H A Dar9300_reset.c3050 OS_REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | in ar9300_process_ini()
3061 OS_REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2, AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK); /* clr synthon */ in ar9300_process_ini()
3069 …OS_REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2, AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1); /* set synthon… in ar9300_process_ini()
3081 OS_REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0, 1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S | in ar9300_process_ini()
H A Dar9300phy.h913 #define AR_PHY_65NM_CH0_RXTX2 AR_PHY_65NM(ch0_RXTX2) macro