Home
last modified time | relevance | path

Searched hist:"63624 e404b5eb6fc11a503331e67ce29af074021" (Results 1 – 7 of 7) sorted by relevance

/haiku/src/add-ons/accelerants/radeon_hd/
H A Dgpu.h63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Dpll.h63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Dgpu.cpp63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Daccelerant.cpp63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Dpll.cpp63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Dencoder.cpp63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)
H A Daccelerant.h63624e404b5eb6fc11a503331e67ce29af074021 Tue Aug 07 13:53:34 UTC 2012 Alexander von Gluck IV <kallisti5@unixzen.com> radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)