Searched refs:ds_ctl3 (Results 1 – 6 of 6) sorted by relevance
734 ads->ds_ctl3 = (txRate0 << AR_XmitRate0_S) in ar5212SetupTxDesc()753 ads->ds_ctl3 |= (rtsctsRate << AR_RTSCTSRate_S); in ar5212SetupTxDesc()772 ads->ds_ctl3 |= (txRate1 << AR_XmitRate1_S); in ar5212SetupXTxDesc()779 ads->ds_ctl3 |= (txRate2 << AR_XmitRate2_S); in ar5212SetupXTxDesc()786 ads->ds_ctl3 |= (txRate3 << AR_XmitRate3_S); in ar5212SetupXTxDesc()833 ads->ds_ctl3 = __bswap32(AR5212DESC_CONST(ds0)->ds_ctl3); in ar5212FillTxDesc()837 ads->ds_ctl3 = AR5212DESC_CONST(ds0)->ds_ctl3; in ar5212FillTxDesc()851 ads->ds_ctl3 = 0; in ar5212FillTxDesc()910 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate0); in ar5212ProcTxDesc()913 ts->ts_rate = MS(ads->ds_ctl3, AR_XmitRate1); in ar5212ProcTxDesc()[all …]
51 #define ds_ctl3 u.tx.ctl3 macro
376 ads->ds_ctl3 = (txRate0 << AR_XmitRate0_S) in ar5416SetupTxDesc()439 ads->ds_ctl3 |= (txRate1 << AR_XmitRate1_S); in ar5416SetupXTxDesc()444 ads->ds_ctl3 |= (txRate2 << AR_XmitRate2_S); in ar5416SetupXTxDesc()449 ads->ds_ctl3 |= (txRate3 << AR_XmitRate3_S); in ar5416SetupXTxDesc()488 ads->ds_ctl3 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl3); in ar5416FillTxDesc()494 ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3; in ar5416FillTxDesc()512 ads->ds_ctl3 = 0; in ar5416FillTxDesc()587 ads->ds_ctl3 = 0; in ar5416ChainTxDesc()641 ads->ds_ctl3 |= (txRate0 << AR_XmitRate0_S); in ar5416SetupFirstTxDesc()690 ads->ds_ctl3 = __bswap32(AR5416DESC_CONST(ds0)->ds_ctl3); in ar5416SetupLastTxDesc()[all …]
79 #define ds_ctl3 u.tx.ctl3 macro
50 + ads->ds_data0 + ads->ds_ctl3 in ar9300_calc_ptr_chk_sum()86 ads->ds_ctl3 = (seg_len[0] << AR_buf_len_S) & AR_buf_len; in ar9300_fill_tx_desc()
61 u_int32_t ds_ctl3; /* DMA control 3 */ member