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Searched refs:crtc_idx (Results 1 – 14 of 14) sorted by relevance

/haiku/src/add-ons/accelerants/radeon/
H A Dpalette.c22 accelerator_info *ai, int crtc_idx ) in Radeon_InitPalette() argument
30 (crtc_idx == 0 ? 0 : RADEON_DAC2_PALETTE_ACC_CTL) | in Radeon_InitPalette()
42 (crtc_idx == 0 ? 0 : RADEON_DAC2_PALETTE_ACC_CTL) | in Radeon_InitPalette()
54 accelerator_info *ai, int crtc_idx,
81 accelerator_info *ai, int crtc_idx, in setPalette() argument
90 (crtc_idx == 0 ? 0 : RADEON_DAC2_PALETTE_ACC_CTL) | in setPalette()
105 (crtc_idx == 0 ? 0 : RADEON_DAC2_PALETTE_ACC_CTL) | in setPalette()
H A Dpll.c21 accelerator_info *ai, int crtc_idx ) in Radeon_PLLWaitForReadUpdateComplete() argument
29 …if( (Radeon_INPLL( ai->regs, ai->si->asic, crtc_idx == 0 ? RADEON_PPLL_REF_DIV : RADEON_P2PLL_REF_… in Radeon_PLLWaitForReadUpdateComplete()
36 accelerator_info *ai, int crtc_idx ) in Radeon_PLLWriteUpdate() argument
38 Radeon_PLLWaitForReadUpdateComplete( ai, crtc_idx ); in Radeon_PLLWriteUpdate()
41 crtc_idx == 0 ? RADEON_PPLL_REF_DIV : RADEON_P2PLL_REF_DIV, in Radeon_PLLWriteUpdate()
455 accelerator_info *ai, int crtc_idx, pll_regs *values ) in Radeon_ProgramPLL() argument
464 Radeon_OUTPLLP( regs, asic, crtc_idx == 0 ? RADEON_VCLK_ECP_CNTL : RADEON_PIXCLKS_CNTL, in Radeon_ProgramPLL()
468 crtc_idx == 0 ? RADEON_PPLL_CNTL : RADEON_P2PLL_CNTL, in Radeon_ProgramPLL()
483 if( ai->si->new_pll && crtc_idx == 0 ) { in Radeon_ProgramPLL()
493 crtc_idx == 0 ? RADEON_PPLL_REF_DIV : RADEON_P2PLL_REF_DIV, in Radeon_ProgramPLL()
[all …]
H A DCursor.c17 static void moveOneCursor( accelerator_info *ai, int crtc_idx, int x, int y );
20 void Radeon_SetCursorColors( accelerator_info *ai, int crtc_idx ) in Radeon_SetCursorColors() argument
24 if( crtc_idx == 0 ) { in Radeon_SetCursorColors()
151 void moveOneCursor( accelerator_info *ai, int crtc_idx, int x, int y ) in moveOneCursor() argument
154 crtc_info *crtc = &ai->si->crtc[crtc_idx]; in moveOneCursor()
180 Radeon_ShowCursor( ai, crtc_idx ); in moveOneCursor()
196 if( crtc_idx == 0 ) { in moveOneCursor()
220 void Radeon_ShowCursor( accelerator_info *ai, int crtc_idx ) in Radeon_ShowCursor() argument
223 crtc_info *crtc = &ai->si->crtc[crtc_idx]; in Radeon_ShowCursor()
226 if( crtc_idx == 0 ) { in Radeon_ShowCursor()
H A Dradeon_accelerant.h100 status_t Radeon_SetDPMS( accelerator_info *ai, int crtc_idx, int mode );
101 uint32 Radeon_GetDPMS( accelerator_info *ai, int crtc_idx );
105 void Radeon_SetCursorColors( accelerator_info *ai, int crtc_idx );
106 void Radeon_ShowCursor( accelerator_info *ai, int crtc_idx );
134 void Radeon_InitOverlay( accelerator_info *ai, int crtc_idx );
146 void Radeon_InitPalette( accelerator_info *ai, int crtc_idx );
H A Dmonitor_routing.c128 int crtc_idx = (display_devices[1] & dd_crt) != 0; in Radeon_CalcMonitorRouting() local
142 values->dac_cntl2 |= crtc_idx == 0 ? 0 : RADEON_DAC_CLK_SEL_CRTC2; in Radeon_CalcMonitorRouting()
153 (crtc_idx == 0 ? 0 : RADEON_DISP_DAC_SOURCE_CRTC2); in Radeon_CalcMonitorRouting()
293 int crtc_idx = (display_devices[1] & (dd_tv_crt | dd_ctv | dd_stv)) != 0; in Radeon_CalcMonitorRouting() local
305 values->disp_hw_debug |= crtc_idx == 0 ? RADEON_CRT2_DISP1_SEL : 0; in Radeon_CalcMonitorRouting()
313 values->disp_tv_out_cntl |= crtc_idx == 0 ? 0 : RADEON_DISP_TV_PATH_SRC; in Radeon_CalcMonitorRouting()
323 crtc_idx == 0 ? 0 : RADEON_DISP_TVDAC_SOURCE_CRTC2; in Radeon_CalcMonitorRouting()
333 int crtc_idx = (display_devices[1] & (dd_ctv | dd_stv)) != 0; in Radeon_CalcMonitorRouting() local
336 values->pixclks_cntl |= crtc_idx == 0 ? in Radeon_CalcMonitorRouting()
378 int crtc_idx = (display_devices[1] & (dd_lvds | dd_dvi)) != 0; in Radeon_CalcMonitorRouting() local
[all …]
H A Dcrtc.c19 void Radeon_ProgramCRTCRegisters( accelerator_info *ai, int crtc_idx, in Radeon_ProgramCRTCRegisters() argument
26 if( crtc_idx == 0 ) { in Radeon_ProgramCRTCRegisters()
80 if( crtc->crtc_idx == 0 ) { in Radeon_CalcCRTCRegisters()
141 offset, crtc->crtc_idx ); in moveOneDisplay()
143 OUTREG( ai->regs, crtc->crtc_idx == 0 ? RADEON_CRTC_OFFSET : RADEON_CRTC2_OFFSET, offset ); in moveOneDisplay()
H A Doverlay.c54 accelerator_info *ai, int crtc_idx ) in Radeon_InitOverlay() argument
96 if( si->crtc[crtc_idx].mode.timing.pixel_clock < 175000 ) in Radeon_InitOverlay()
112 si->active_overlay.crtc_idx = si->pending_overlay.crtc_idx; in Radeon_InitOverlay()
530 accelerator_info *ai, int crtc_idx ) in Radeon_ShowOverlay() argument
537 crtc_info *crtc = &si->crtc[crtc_idx]; in Radeon_ShowOverlay()
863 crtc->crtc_idx == 0 ? RADEON_OV0_Y_X_START : RADEON_OV1_Y_X_START, in Radeon_ShowOverlay()
866 crtc->crtc_idx == 0 ? RADEON_OV0_Y_X_END : RADEON_OV1_Y_X_END, in Radeon_ShowOverlay()
891 (crtc->crtc_idx == 0 ? 0 : RADEON_SCALER_CRTC_SEL ); in Radeon_ShowOverlay()
955 si->active_overlay.crtc_idx = -1; in Radeon_HideOverlay()
1067 int crtc_idx; in Radeon_UpdateOverlay() local
[all …]
H A Ddpms.c291 status_t Radeon_SetDPMS( accelerator_info *ai, int crtc_idx, int mode ) in Radeon_SetDPMS() argument
293 crtc_info *crtc = &ai->si->crtc[crtc_idx]; in Radeon_SetDPMS()
306 if( crtc_idx == 0 ) in Radeon_SetDPMS()
317 if( crtc_idx == 0 || 1/* && (crtc->active_displays & dd_crt) != 0 */) in Radeon_SetDPMS()
320 if( crtc_idx == 1 || (crtc->active_displays & (dd_tv_crt | dd_ctv | dd_stv)) != 0 ) in Radeon_SetDPMS()
381 uint32 Radeon_GetDPMS( accelerator_info *ai, int crtc_idx ) in Radeon_GetDPMS() argument
383 if( crtc_idx == 0 ) in Radeon_GetDPMS()
H A DSetDisplayMode.c205 if( crtc->crtc_idx == 0 ) in Radeon_SetMode()
228 crtc->crtc_idx, internal_tv_encoder, vc->tv_standard, disp_devices ); in Radeon_SetMode()
246 if( crtc->crtc_idx == 0 ) in Radeon_SetMode()
261 Radeon_ProgramCRTCRegisters( ai, crtc->crtc_idx, &crtc_values ); in Radeon_SetMode()
265 if( crtc->crtc_idx == 0 ) in Radeon_SetMode()
272 Radeon_ProgramPLL( ai, crtc->crtc_idx, &pll_values ); in Radeon_SetMode()
311 si->active_overlay.crtc_idx = -1; in Radeon_SetMode()
H A Dset_mode.h210 void Radeon_ProgramCRTCRegisters( accelerator_info *ai, int crtc_idx,
217 void Radeon_ProgramPLL( accelerator_info *ai, int crtc_idx, pll_regs *values );
268 impactv_params *params, impactv_regs *values, int crtc_idx,
H A DInitAccelerant.c195 si->active_overlay.crtc_idx = -1; in INIT_ACCELERANT()
196 si->pending_overlay.crtc_idx = -1; in INIT_ACCELERANT()
H A Dimpactv.c418 impactv_params *params, impactv_regs *values, int crtc_idx, in Radeon_CalcImpacTVRegisters() argument
660 ((crtc_idx == 1 ? 2 : 0) << RADEON_TV_RGB_CNTL_RGB_SRC_SEL_SHIFT) | in Radeon_CalcImpacTVRegisters()
/haiku/headers/private/graphics/radeon/
H A Dradeon_interface.h307 int crtc_idx; // index of CRTC member
376 int crtc_idx; // crtc where the overlay is shown on member
/haiku/src/add-ons/kernel/drivers/graphics/radeon/
H A Dinit.c265 si->crtc[0].crtc_idx = 0; in Radeon_FirstOpen()
267 si->crtc[1].crtc_idx = 1; in Radeon_FirstOpen()