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Searched refs:ch0_DDR_DPLL2 (Results 1 – 2 of 2) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300phy.h1822 #define AR_HORNET_CH0_DDR_DPLL2 AR_PHY_65NM(overlay_0x16180.Poseidon.ch0_DDR_DPLL2)
H A Dosprey_reg_map.h2024 volatile u_int32_t ch0_DDR_DPLL2; /* 0x16244 - 0x16248 */ member