| /haiku/src/add-ons/accelerants/s3/ |
| H A D | trio64_mode.cpp | 87 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Trio64_ModeInit()
97 WriteSeqReg(0x12, sr12); in Trio64_ModeInit()
98 WriteSeqReg(0x13, sr13); in Trio64_ModeInit()
103 WriteSeqReg(0x15, tmp | 0x02); in Trio64_ModeInit()
104 WriteSeqReg(0x15, tmp | 0x22); in Trio64_ModeInit()
105 WriteSeqReg(0x15, tmp | 0x02); in Trio64_ModeInit()
163 WriteSeqReg(0x15, 0x00, 0x10); // turn off pixel multiplex in Trio64_ModeInit()
164 WriteSeqReg(0x18, 0x00, 0x80); in Trio64_ModeInit()
271 WriteSeqReg(0x01, 0x20, 0x20); // blank the screen in Trio64_SetDisplayMode()
280 WriteSeqReg(0x01, 0x00, 0x20); // unblank the screen in Trio64_SetDisplayMode()
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| H A D | savage_dpms.cpp | 78 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Savage_SetDPMSMode()
99 WriteSeqReg(0x0d, sr0D); in Savage_SetDPMSMode()
103 WriteSeqReg(0x31, 0x10, 0x10); // SR31 bit 4 - FP enable in Savage_SetDPMSMode()
108 WriteSeqReg(0x31, 0x00, 0x10); // SR31 bit 4 - FP enable in Savage_SetDPMSMode()
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| H A D | savage_mode.cpp | 148 WriteSeqReg(0x26, 0x4f); // select IGA 2 read/writes in Savage_SetGBD_MX()
150 WriteSeqReg(0x26, 0x40); // select IGA 1 in Savage_SetGBD_MX()
203 WriteSeqReg(0x26, 0x4f); // select IGA 2 read/writes in Savage_SetGBD_Super()
205 WriteSeqReg(0x26, 0x40); // select IGA 1 in Savage_SetGBD_Super()
516 WriteSeqReg(0x08, 0x06); // unlock sequencer regs SR09~SRFF in Savage_WriteMode()
533 WriteSeqReg(0x19, 0); in Savage_WriteMode()
543 WriteSeqReg(0x30, 0x00, 0x08); in Savage_WriteMode()
560 WriteSeqReg(0x54, 0x10); in Savage_WriteMode()
561 WriteSeqReg(0x56, 0x10); in Savage_WriteMode()
614 WriteSeqReg(0x1b, regRec.SR1B); in Savage_WriteMode()
[all …]
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| H A D | virge_mode.cpp | 336 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Virge_WriteMode()
340 WriteSeqReg(0x12, regRec.SR12); in Virge_WriteMode()
341 WriteSeqReg(0x13, regRec.SR13); in Virge_WriteMode()
344 WriteSeqReg(0x29, regRec.SR29); in Virge_WriteMode()
347 WriteSeqReg(0x54, regRec.SR54); in Virge_WriteMode()
348 WriteSeqReg(0x55, regRec.SR55); in Virge_WriteMode()
349 WriteSeqReg(0x56, regRec.SR56); in Virge_WriteMode()
350 WriteSeqReg(0x57, regRec.SR57); in Virge_WriteMode()
353 WriteSeqReg(0x18, regRec.SR18); in Virge_WriteMode()
357 WriteSeqReg(0x15, tmp | 0x03); in Virge_WriteMode()
[all …]
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| H A D | virge_dpms.cpp | 69 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Virge_SetDPMSMode()
90 WriteSeqReg(0x0d, sr0D); in Virge_SetDPMSMode()
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| H A D | trio64_dpms.cpp | 69 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Trio64_SetDPMSMode()
90 WriteSeqReg(0x0d, sr0D); in Trio64_SetDPMSMode()
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| H A D | register_io.h | 50 void WriteSeqReg(uint8 index, uint8 value);
51 void WriteSeqReg(uint8 index, uint8 value, uint8 mask);
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| H A D | savage_init.cpp | 166 WriteSeqReg(0x08, 0x06); // unlock sequencer regs SR09~SRFF in Savage_Init()
261 WriteSeqReg(0x30, 0x00, 0x02); // clear bit 1 in Savage_Init()
281 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Savage_Init()
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| H A D | register_io.cpp | 176 void WriteSeqReg(uint8 index, uint8 value) in WriteSeqReg() function
188 void WriteSeqReg(uint8 index, uint8 value, uint8 mask) in WriteSeqReg() function
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| H A D | trio64_init.cpp | 123 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Trio64_Init()
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| H A D | virge_init.cpp | 200 WriteSeqReg(0x08, 0x06); // unlock extended sequencer regs in Virge_Init()
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| /haiku/src/add-ons/accelerants/intel_810/ |
| H A D | i810_dpms.cpp | 97 WriteSeqReg(1, seq01); // turn the screen on/off in I810_SetDPMSMode()
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| H A D | i810_regs.h | 166 WriteSeqReg(uint8 index, uint8 value) in WriteSeqReg() function
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