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Searched refs:NV4_SURFACE (Results 1 – 3 of 3) sorted by relevance

/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc_dma.c247 ACCW(HT_HANDL_00, (0x80000000 | NV4_SURFACE)); /* 32bit handle */ in nv_acc_init_dma()
1030 si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */ in nv_acc_init_dma()
1128 nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 4); in nv_acc_init_dma()
1602 !si->engine.fifo.ch_ptr[NV4_SURFACE] || in nv_acc_assert_fifo_dma()
1622 si->engine.fifo.handle[3] = NV4_SURFACE; in nv_acc_assert_fifo_dma()
1778 nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 1); in SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA()
1876 nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 1); in SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA()
1943 nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 1); in OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA()
2057 nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 1); in OFFSCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA()
H A Dnv_acc.c229 ACCW(HT_HANDL_00, (0x80000000 | NV4_SURFACE)); /* 32bit handle */ in nv_acc_init()
1012 si->engine.fifo.handle[3] = NV4_SURFACE; /* NV10_CONTEXT_SURFACES_2D is identical */ in nv_acc_init()
/haiku/headers/private/graphics/nvidia/
H A DDriverInterface.h168 #define NV4_SURFACE 0x00000010 /* 2D */ macro