1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30 #ifndef _EM_H_DEFINED_ 31 #define _EM_H_DEFINED_ 32 33 #ifndef __HAIKU__ 34 #include "opt_ddb.h" 35 #include "opt_inet.h" 36 #include "opt_inet6.h" 37 #include "opt_rss.h" 38 #endif 39 40 #ifdef HAVE_KERNEL_OPTION_HEADERS 41 #include "opt_device_polling.h" 42 #endif 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #ifdef DDB 47 #include <sys/types.h> 48 #include <ddb/ddb.h> 49 #endif 50 #include <sys/buf_ring.h> 51 #include <sys/bus.h> 52 #include <sys/endian.h> 53 #include <sys/kernel.h> 54 #include <sys/kthread.h> 55 #include <sys/malloc.h> 56 #include <sys/mbuf.h> 57 #include <sys/module.h> 58 #include <sys/rman.h> 59 #include <sys/smp.h> 60 #include <sys/socket.h> 61 #include <sys/sockio.h> 62 #include <sys/sysctl.h> 63 #include <sys/taskqueue.h> 64 #include <sys/eventhandler.h> 65 #include <machine/bus.h> 66 #include <machine/resource.h> 67 68 #include <net/bpf.h> 69 #include <net/ethernet.h> 70 #include <net/if.h> 71 #include <net/if_var.h> 72 #include <net/if_arp.h> 73 #include <net/if_dl.h> 74 #include <net/if_media.h> 75 #include <net/iflib.h> 76 #ifdef RSS 77 #include <net/rss_config.h> 78 #include <netinet/in_rss.h> 79 #endif 80 81 #include <net/if_types.h> 82 #include <net/if_vlan_var.h> 83 84 #include <netinet/in_systm.h> 85 #include <netinet/in.h> 86 #include <netinet/if_ether.h> 87 #include <netinet/ip.h> 88 #include <netinet/ip6.h> 89 #include <netinet/tcp.h> 90 #include <netinet/udp.h> 91 92 #include <machine/in_cksum.h> 93 #include <dev/led/led.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcireg.h> 96 97 #include "e1000_api.h" 98 #include "e1000_82571.h" 99 #include "ifdi_if.h" 100 101 /* Tunables */ 102 103 /* 104 * EM_MAX_TXD: Maximum number of Transmit Descriptors 105 * Valid Range: 80-256 for 82542 and 82543-based adapters 106 * 80-4096 for others 107 * Default Value: 1024 108 * This value is the number of transmit descriptors allocated by the driver. 109 * Increasing this value allows the driver to queue more transmits. Each 110 * descriptor is 16 bytes. 111 * Since TDLEN should be multiple of 128bytes, the number of transmit 112 * desscriptors should meet the following condition. 113 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 114 */ 115 #define EM_MIN_TXD 128 116 #define EM_MAX_TXD 4096 117 #define EM_DEFAULT_TXD 1024 118 #define EM_DEFAULT_MULTI_TXD 4096 119 #define IGB_MAX_TXD 4096 120 121 /* 122 * EM_MAX_RXD - Maximum number of receive Descriptors 123 * Valid Range: 80-256 for 82542 and 82543-based adapters 124 * 80-4096 for others 125 * Default Value: 1024 126 * This value is the number of receive descriptors allocated by the driver. 127 * Increasing this value allows the driver to buffer more incoming packets. 128 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 129 * descriptor. The maximum MTU size is 16110. 130 * Since TDLEN should be multiple of 128bytes, the number of transmit 131 * desscriptors should meet the following condition. 132 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 133 */ 134 #define EM_MIN_RXD 128 135 #define EM_MAX_RXD 4096 136 #define EM_DEFAULT_RXD 1024 137 #define EM_DEFAULT_MULTI_RXD 4096 138 #define IGB_MAX_RXD 4096 139 140 /* 141 * EM_TIDV - Transmit Interrupt Delay Value 142 * Valid Range: 0-65535 (0=off) 143 * Default Value: 64 144 * This value delays the generation of transmit interrupts in units of 145 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 146 * efficiency if properly tuned for specific network traffic. If the 147 * system is reporting dropped transmits, this value may be set too high 148 * causing the driver to run out of available transmit descriptors. 149 */ 150 #define EM_TIDV 64 151 152 /* 153 * EM_TADV - Transmit Absolute Interrupt Delay Value 154 * (Not valid for 82542/82543/82544) 155 * Valid Range: 0-65535 (0=off) 156 * Default Value: 64 157 * This value, in units of 1.024 microseconds, limits the delay in which a 158 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 159 * this value ensures that an interrupt is generated after the initial 160 * packet is sent on the wire within the set amount of time. Proper tuning, 161 * along with EM_TIDV, may improve traffic throughput in specific 162 * network conditions. 163 */ 164 #define EM_TADV 64 165 166 /* 167 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 168 * Valid Range: 0-65535 (0=off) 169 * Default Value: 0 170 * This value delays the generation of receive interrupts in units of 1.024 171 * microseconds. Receive interrupt reduction can improve CPU efficiency if 172 * properly tuned for specific network traffic. Increasing this value adds 173 * extra latency to frame reception and can end up decreasing the throughput 174 * of TCP traffic. If the system is reporting dropped receives, this value 175 * may be set too high, causing the driver to run out of available receive 176 * descriptors. 177 * 178 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 179 * may hang (stop transmitting) under certain network conditions. 180 * If this occurs a WATCHDOG message is logged in the system 181 * event log. In addition, the controller is automatically reset, 182 * restoring the network connection. To eliminate the potential 183 * for the hang ensure that EM_RDTR is set to 0. 184 */ 185 #define EM_RDTR 0 186 187 /* 188 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 189 * Valid Range: 0-65535 (0=off) 190 * Default Value: 64 191 * This value, in units of 1.024 microseconds, limits the delay in which a 192 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 193 * this value ensures that an interrupt is generated after the initial 194 * packet is received within the set amount of time. Proper tuning, 195 * along with EM_RDTR, may improve traffic throughput in specific network 196 * conditions. 197 */ 198 #define EM_RADV 64 199 200 /* 201 * This parameter controls whether or not autonegotiation is enabled. 202 * 0 - Disable autonegotiation 203 * 1 - Enable autonegotiation 204 */ 205 #define DO_AUTO_NEG 1 206 207 /* 208 * This parameter control whether or not the driver will wait for 209 * autonegotiation to complete. 210 * 1 - Wait for autonegotiation to complete 211 * 0 - Don't wait for autonegotiation to complete 212 */ 213 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 214 215 /* Tunables -- End */ 216 217 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 218 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 219 ADVERTISE_1000_FULL) 220 221 #define AUTO_ALL_MODES 0 222 223 /* PHY master/slave setting */ 224 #define EM_MASTER_SLAVE e1000_ms_hw_default 225 226 /* 227 * Miscellaneous constants 228 */ 229 #define EM_VENDOR_ID 0x8086 230 #define EM_FLASH 0x0014 231 232 #define EM_JUMBO_PBA 0x00000028 233 #define EM_DEFAULT_PBA 0x00000030 234 #define EM_SMARTSPEED_DOWNSHIFT 3 235 #define EM_SMARTSPEED_MAX 15 236 #define EM_MAX_LOOP 10 237 238 #define MAX_NUM_MULTICAST_ADDRESSES 128 239 #define PCI_ANY_ID (~0U) 240 #define ETHER_ALIGN 2 241 #define EM_FC_PAUSE_TIME 0x0680 242 #define EM_EEPROM_APME 0x400; 243 #define EM_82544_APME 0x0004; 244 245 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ 246 #define IGB_MEDIA_RESET (1 << 0) 247 248 /* Define the starting Interrupt rate per Queue */ 249 #define IGB_INTS_PER_SEC 8000 250 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) 251 252 #define IGB_LINK_ITR 2000 253 #define I210_LINK_DELAY 1000 254 255 #define IGB_TXPBSIZE 20408 256 #define IGB_HDR_BUF 128 257 #define IGB_PKTTYPE_MASK 0x0000FFF0 258 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 259 260 /* 261 * Driver state logic for the detection of a hung state 262 * in hardware. Set TX_HUNG whenever a TX packet is used 263 * (data is sent) and clear it when txeof() is invoked if 264 * any descriptors from the ring are cleaned/reclaimed. 265 * Increment internal counter if no descriptors are cleaned 266 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, 267 * reset adapter. 268 */ 269 #define EM_TX_IDLE 0x00000000 270 #define EM_TX_BUSY 0x00000001 271 #define EM_TX_HUNG 0x80000000 272 #define EM_TX_MAXTRIES 10 273 274 #define PCICFG_DESC_RING_STATUS 0xe4 275 #define FLUSH_DESC_REQUIRED 0x100 276 277 278 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ 279 ((hw->mac.type <= e1000_82576) ? 16 : 8)) 280 #define IGB_RX_HTHRESH 8 281 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ 282 (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) 283 284 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) 285 #define IGB_TX_HTHRESH 1 286 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ 287 sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) 288 289 /* 290 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 291 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 292 * also optimize cache line size effect. H/W supports up to cache line size 128. 293 */ 294 #define EM_DBA_ALIGN 128 295 296 /* 297 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 298 */ 299 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ 300 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ 301 #define TARC_MQ_FIX (1 << 23) | \ 302 (1 << 24) | \ 303 (1 << 25) /* Handle errata in MQ mode */ 304 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ 305 306 /* PCI Config defines */ 307 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) 308 #define EM_BAR_TYPE_MASK 0x00000001 309 #define EM_BAR_TYPE_MMEM 0x00000000 310 #define EM_BAR_TYPE_IO 0x00000001 311 #define EM_BAR_TYPE_FLASH 0x0014 312 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) 313 #define EM_BAR_MEM_TYPE_MASK 0x00000006 314 #define EM_BAR_MEM_TYPE_32BIT 0x00000000 315 #define EM_BAR_MEM_TYPE_64BIT 0x00000004 316 317 /* Defines for printing debug information */ 318 #define DEBUG_INIT 0 319 #define DEBUG_IOCTL 0 320 #define DEBUG_HW 0 321 322 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 323 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 324 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 325 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 326 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 327 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 328 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 329 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 330 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 331 332 #define EM_MAX_SCATTER 40 333 #define EM_VFTA_SIZE 128 334 #define EM_TSO_SIZE 65535 335 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ 336 #define ETH_ZLEN 60 337 338 /* Offload bits in mbuf flag */ 339 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 340 CSUM_IP6_UDP | CSUM_IP6_TCP) 341 #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 342 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ 343 CSUM_IP6_SCTP) 344 345 #define IGB_PKTTYPE_MASK 0x0000FFF0 346 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 347 348 /* 349 * 82574 has a nonstandard address for EIAC 350 * and since its only used in MSI-X, and in 351 * the em driver only 82574 uses MSI-X we can 352 * solve it just using this define. 353 */ 354 #define EM_EIAC 0x000DC 355 /* 356 * 82574 only reports 3 MSI-X vectors by default; 357 * defines assisting with making it report 5 are 358 * located here. 359 */ 360 #define EM_NVM_PCIE_CTRL 0x1B 361 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) 362 #define EM_NVM_MSIX_N_SHIFT 7 363 364 struct e1000_softc; 365 366 struct em_int_delay_info { 367 struct e1000_softc *sc; /* Back-pointer to the sc struct */ 368 int offset; /* Register offset to read/write */ 369 int value; /* Current value in usecs */ 370 }; 371 372 /* 373 * The transmit ring, one per tx queue 374 */ 375 struct tx_ring { 376 struct e1000_softc *sc; 377 struct e1000_tx_desc *tx_base; 378 uint64_t tx_paddr; 379 qidx_t *tx_rsq; 380 bool tx_tso; /* last tx was tso */ 381 uint8_t me; 382 qidx_t tx_rs_cidx; 383 qidx_t tx_rs_pidx; 384 qidx_t tx_cidx_processed; 385 /* Interrupt resources */ 386 void *tag; 387 struct resource *res; 388 unsigned long tx_irq; 389 390 /* Saved csum offloading context information */ 391 int csum_flags; 392 int csum_lhlen; 393 int csum_iphlen; 394 395 int csum_thlen; 396 int csum_mss; 397 int csum_pktlen; 398 399 uint32_t csum_txd_upper; 400 uint32_t csum_txd_lower; /* last field */ 401 }; 402 403 /* 404 * The Receive ring, one per rx queue 405 */ 406 struct rx_ring { 407 struct e1000_softc *sc; 408 struct em_rx_queue *que; 409 u32 me; 410 u32 payload; 411 union e1000_rx_desc_extended *rx_base; 412 uint64_t rx_paddr; 413 414 /* Interrupt resources */ 415 void *tag; 416 struct resource *res; 417 bool discard; 418 419 /* Soft stats */ 420 unsigned long rx_irq; 421 unsigned long rx_discarded; 422 unsigned long rx_packets; 423 unsigned long rx_bytes; 424 }; 425 426 struct em_tx_queue { 427 struct e1000_softc *sc; 428 u32 msix; 429 u32 eims; /* This queue's EIMS bit */ 430 u32 me; 431 struct tx_ring txr; 432 }; 433 434 struct em_rx_queue { 435 struct e1000_softc *sc; 436 u32 me; 437 u32 msix; 438 u32 eims; 439 struct rx_ring rxr; 440 u64 irqs; 441 struct if_irq que_irq; 442 }; 443 444 /* Our softc structure */ 445 struct e1000_softc { 446 struct e1000_hw hw; 447 448 if_softc_ctx_t shared; 449 if_ctx_t ctx; 450 #define tx_num_queues shared->isc_ntxqsets 451 #define rx_num_queues shared->isc_nrxqsets 452 #define intr_type shared->isc_intr 453 /* FreeBSD operating-system-specific structures. */ 454 struct e1000_osdep osdep; 455 device_t dev; 456 struct cdev *led_dev; 457 458 struct em_tx_queue *tx_queues; 459 struct em_rx_queue *rx_queues; 460 struct if_irq irq; 461 462 struct resource *memory; 463 struct resource *flash; 464 struct resource *ioport; 465 466 struct resource *res; 467 void *tag; 468 u32 linkvec; 469 u32 ivars; 470 471 struct ifmedia *media; 472 int msix; 473 int if_flags; 474 int em_insert_vlan_header; 475 u32 ims; 476 bool in_detach; 477 478 u32 flags; 479 /* Task for FAST handling */ 480 struct grouptask link_task; 481 482 u16 num_vlans; 483 u32 txd_cmd; 484 485 u32 rx_mbuf_sz; 486 487 /* Management and WOL features */ 488 u32 wol; 489 bool has_manage; 490 bool has_amt; 491 492 /* Multicast array memory */ 493 u8 *mta; 494 495 /* 496 ** Shadow VFTA table, this is needed because 497 ** the real vlan filter table gets cleared during 498 ** a soft reset and the driver needs to be able 499 ** to repopulate it. 500 */ 501 u32 shadow_vfta[EM_VFTA_SIZE]; 502 503 /* Info about the interface */ 504 u16 link_active; 505 u16 fc; 506 u16 link_speed; 507 u16 link_duplex; 508 u32 smartspeed; 509 u32 dmac; 510 int link_mask; 511 int tso_automasked; 512 513 u64 que_mask; 514 515 /* We need to store this at attach due to e1000 hw/sw locking model */ 516 struct e1000_fw_version fw_ver; 517 518 struct em_int_delay_info tx_int_delay; 519 struct em_int_delay_info tx_abs_int_delay; 520 struct em_int_delay_info rx_int_delay; 521 struct em_int_delay_info rx_abs_int_delay; 522 struct em_int_delay_info tx_itr; 523 524 /* Misc stats maintained by the driver */ 525 unsigned long dropped_pkts; 526 unsigned long link_irq; 527 unsigned long rx_overruns; 528 unsigned long watchdog_events; 529 530 struct e1000_hw_stats stats; 531 u16 vf_ifp; 532 }; 533 534 /******************************************************************************** 535 * vendor_info_array 536 * 537 * This array contains the list of Subvendor/Subdevice IDs on which the driver 538 * should load. 539 * 540 ********************************************************************************/ 541 typedef struct _em_vendor_info_t { 542 unsigned int vendor_id; 543 unsigned int device_id; 544 unsigned int subvendor_id; 545 unsigned int subdevice_id; 546 unsigned int index; 547 } em_vendor_info_t; 548 549 void em_dump_rs(struct e1000_softc *); 550 551 #define EM_RSSRK_SIZE 4 552 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ 553 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ 554 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ 555 key[(i) * EM_RSSRK_SIZE + 3] << 24) 556 #endif /* _EM_H_DEFINED_ */ 557