1 /* 2 * Copyright 2004-2015 Haiku, Inc. All rights reserved. 3 * Distributed under the terms of the MIT License. 4 * 5 * Authors: 6 * Jérôme Duval, jerome.duval@free.fr 7 * Marcus Overhagen, marcus@overhagen.de 8 * Jérôme Lévêque, leveque.jerome@gmail.com 9 */ 10 #ifndef _ICE1712_H_ 11 #define _ICE1712_H_ 12 13 14 #include <PCI.h> 15 #include <KernelExport.h> 16 17 #include "debug.h" 18 #include "hmulti_audio.h" 19 20 21 #define DRIVER_NAME "ice1712" 22 #define VERSION "0.6" 23 24 #define ICE1712_VENDOR_ID 0x1412 25 #define ICE1712_DEVICE_ID 0x1712 26 27 typedef enum ice1712Product { 28 ICE1712_SUBDEVICE_DELTA1010 = 0x121430d6, 29 ICE1712_SUBDEVICE_DELTADIO2496 = 0x121431d6, 30 ICE1712_SUBDEVICE_DELTA66 = 0x121432d6, 31 ICE1712_SUBDEVICE_DELTA44 = 0x121433d6, 32 ICE1712_SUBDEVICE_AUDIOPHILE_2496 = 0x121434d6, 33 ICE1712_SUBDEVICE_DELTA410 = 0x121438d6, 34 ICE1712_SUBDEVICE_DELTA1010LT = 0x12143bd6, 35 ICE1712_SUBDEVICE_VX442 = 0x12143cd6, 36 } ice1712Product; 37 38 #define NUM_CARDS 4 39 #define MAX_ADC 12 40 // 5 stereo output + the Digital mixer 41 #define MAX_DAC 10 42 #define MAX_MIDI_INTERFACE 2 43 #define SWAPPING_BUFFERS 2 44 #define SAMPLE_SIZE 4 45 #define MIN_BUFFER_FRAMES 64 46 #define MAX_BUFFER_FRAMES 2048 47 48 #define ICE1712_HARDWARE_VOLUME 10 49 #define ICE1712_MUTE_VALUE 0x7F 50 51 #define PLAYBACK_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_DAC * SAMPLE_SIZE) 52 #define RECORD_BUFFER_SIZE (MAX_BUFFER_FRAMES * MAX_ADC * SAMPLE_SIZE) 53 54 #define PLAYBACK_BUFFER_TOTAL_SIZE (PLAYBACK_BUFFER_SIZE * SWAPPING_BUFFERS) 55 #define RECORD_BUFFER_TOTAL_SIZE (RECORD_BUFFER_SIZE * SWAPPING_BUFFERS) 56 57 #define SPDIF_LEFT 8 58 #define SPDIF_RIGHT 9 59 #define MIXER_OUT_LEFT 10 60 #define MIXER_OUT_RIGHT 11 61 62 #define SPDIF_OUT_PRESENT 1 63 #define SPDIF_IN_PRESENT 2 64 65 #define ICE1712_SAMPLERATE_96K 0x7 66 #define ICE1712_SAMPLERATE_48K 0x0 67 #define ICE1712_SAMPLERATE_88K2 0xB 68 #define ICE1712_SAMPLERATE_44K1 0x8 69 70 struct ice1712; 71 72 typedef struct ice1712Midi { 73 struct ice1712 *card; 74 void *mpu401device; 75 uint8 int_mask; 76 char name[64]; 77 } ice1712Midi; 78 79 typedef struct _codecCommLines 80 { 81 uint8 clock; 82 uint8 data_in; 83 uint8 data_out; 84 uint8 cs_mask; 85 //a Mask for removing all Chip select 86 } codecCommLines; 87 88 typedef struct ice1712Volume 89 { 90 float volume; 91 bool mute; 92 } ice1712Volume; 93 94 typedef struct ice1712Settings 95 { 96 ice1712Volume playback[ICE1712_HARDWARE_VOLUME]; 97 ice1712Volume record[ICE1712_HARDWARE_VOLUME]; 98 99 uint32 bufferSize; 100 101 //General Settings 102 uint8 clock; //an index 103 104 //S/PDif Settings 105 uint8 outFormat; //an index 106 uint8 emphasis; //an index 107 uint8 copyMode; //an index 108 109 //Output settings 110 uint8 output[5]; //an index 111 112 uint8 reserved[32]; 113 } ice1712Settings; 114 115 typedef struct ice1712HW 116 { 117 int8 nb_ADC; //Mono Channel 118 int8 nb_DAC; //Mono Channel 119 int8 nb_MPU401; 120 int8 spdif; 121 122 //in the format of the register 123 uint8 samplingRate; 124 uint32 lockSource; 125 126 ice1712Product product; 127 } ice1712HW; 128 129 typedef struct ice1712 130 { 131 uint32 irq; 132 pci_info info; 133 char name[128]; 134 135 ice1712Midi midiItf[MAX_MIDI_INTERFACE]; 136 137 uint32 Controller; //PCI_10 138 uint32 DDMA; //PCI_14 139 uint32 DMA_Path; //PCI_18 140 uint32 Multi_Track; //PCI_1C 141 142 uint8 eeprom_data[32]; 143 144 //We hope all manufacturers will use same 145 //communication lines for speaking with codec 146 codecCommLines CommLines; 147 148 uint32 buffer; 149 bigtime_t played_time; 150 uint32 buffer_size; //in frames 151 uint32 frames_count; 152 153 //Output 154 area_id mem_id_pb; 155 physical_entry phys_pb; 156 addr_t log_addr_pb; 157 uint8 total_output_channels; 158 159 //Input 160 area_id mem_id_rec; 161 physical_entry phys_rec; 162 addr_t log_addr_rec; 163 uint8 total_input_channels; 164 165 sem_id buffer_ready_sem; 166 167 ice1712HW config; 168 ice1712Settings settings; 169 } ice1712; 170 171 //CSS_INTERRUPT_MASK 172 #define CCS_INTERRUPT_MIDI_1 0x80 173 #define CCS_INTERRUPT_MIDI_2 0x20 174 175 //??????? 176 #define GPIO_SPDIF_STATUS 0x02 //Status 177 #define GPIO_SPDIF_CCLK 0x04 //data Clock 178 #define GPIO_SPDIF_DOUT 0x08 //data output 179 180 //For Delta 66 / Delta 44 181 #define DELTA66_DOUT 0x10 // data output 182 #define DELTA66_CLK 0x20 // clock 183 #define DELTA66_CODEC_CS_0 0x40 // AK4524 #0 184 #define DELTA66_CODEC_CS_1 0x80 // AK4524 #1 185 #define DELTA66_CS_MASK 0xD0 // Chip Select mask 186 187 //For AudioPhile 2496 / Delta 410 188 #define AP2496_CLK 0x02 // clock 189 #define AP2496_DIN 0x04 // data input 190 #define AP2496_DOUT 0x08 // data output 191 #define AP2496_SPDIF_CS 0x10 // CS8427 chip select 192 #define AP2496_CODEC_CS 0x20 // AK4528 chip select 193 #define AP2496_CS_MASK 0x30 // Chip Select Mask 194 195 //For Delta 1010 LT 196 #define DELTA1010LT_CLK 0x02 // clock 197 #define DELTA1010LT_DIN 0x04 // data input 198 #define DELTA1010LT_DOUT 0x08 // data output 199 #define DELTA1010LT_CODEC_CS_0 0x00 // AK4524 #0 200 #define DELTA1010LT_CODEC_CS_1 0x10 // AK4524 #1 201 #define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2 202 #define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3 203 #define DELTA1010LT_SPDIF_CS 0x40 // CS8427 204 #define DELTA1010LT_CS_NONE 0x70 // All CS deselected 205 206 //For VX442 207 #define VX442_CLK 0x02 // clock 208 #define VX442_DIN 0x04 // data input 209 #define VX442_DOUT 0x08 // data output 210 #define VX442_SPDIF_CS 0x10 // CS8427 211 #define VX442_CODEC_CS_0 0x20 // ?? #0 212 #define VX442_CODEC_CS_1 0x40 // ?? #1 213 #define VX442_CS_MASK 0x70 // Chip Select Mask 214 215 #define GPIO_I2C_DELAY 5 //Clock Delay for writing 216 //I2C data throw GPIO 217 218 //Register definition for the AK45xx codec (xx = 24 or 28) 219 #define AK45xx_CHIP_ADDRESS 0x02 //Chip address of the codec 220 #define AK45xx_RESET_REGISTER 0x01 221 #define AK45xx_CLOCK_FORMAT_REGISTER 0x02 222 //Other register are not defined cause they are not used, I'm very lazy... 223 224 //Register definition for the CS84xx codec (xx = 27) 225 #define CS84xx_CHIP_ADDRESS 0x10 //Chip address of the codec 226 #define CS84xx_CONTROL_1_PORT_REG 0x01 227 #define CS84xx_CONTROL_2_PORT_REG 0x02 228 #define CS84xx_DATA_FLOW_CONTROL_REG 0x03 229 #define CS84xx_CLOCK_SOURCE_REG 0x04 230 #define CS84xx_SERIAL_INPUT_FORMAT_REG 0x05 231 #define CS84xx_SERIAL_OUTPUT_FORMAT_REG 0x06 232 233 #define CS84xx_VERSION_AND_CHIP_ID 0x7F 234 //Other register are not defined cause they are not used, I'm very lazy... 235 236 237 /* A default switch for all suported product 238 switch (card->product) 239 { 240 case ICE1712_SUBDEVICE_DELTA1010 : 241 break; 242 case ICE1712_SUBDEVICE_DELTADIO2496 : 243 break; 244 case ICE1712_SUBDEVICE_DELTA66 : 245 break; 246 case ICE1712_SUBDEVICE_DELTA44 : 247 break; 248 case ICE1712_SUBDEVICE_AUDIOPHILE : 249 break; 250 case ICE1712_SUBDEVICE_DELTA410 : 251 break; 252 case ICE1712_SUBDEVICE_DELTA1010LT : 253 break; 254 case ICE1712_SUBDEVICE_VX442 : 255 break; 256 } 257 */ 258 259 //This map comes from ALSA sound drivers 260 typedef enum ice1712EEprom { 261 E2PROM_MAP_SUBVENDOR_LOW = 0x00, 262 E2PROM_MAP_SUBVENDOR_HIGH, 263 E2PROM_MAP_SUBDEVICE_LOW, 264 E2PROM_MAP_SUBDEVICE_HIGH, 265 E2PROM_MAP_SIZE, 266 E2PROM_MAP_VERSION, 267 E2PROM_MAP_CONFIG, 268 E2PROM_MAP_ACL, 269 E2PROM_MAP_I2S, 270 E2PROM_MAP_SPDIF, 271 E2PROM_MAP_GPIOMASK, 272 E2PROM_MAP_GPIOSTATE, 273 E2PROM_MAP_GPIODIR, 274 E2PROM_MAP_AC97MAIN, 275 E2PROM_MAP_AC97PCM = 0x0F, 276 E2PROM_MAP_AC97REC = 0x11, 277 E2PROM_MAP_AC97REC_SOURCE = 0x13, 278 E2PROM_MAP_DAC_ID = 0x14, 279 E2PROM_MAP_ADC_ID = 0x18, 280 E2PROM_MAP_EXTRA = 0x1C 281 } ice1712EEprom; 282 283 #endif 284