Searched refs:CIPHY_10BTCSR_ECHO (Results 1 – 6 of 6) sorted by relevance
| /haiku/src/add-ons/kernel/drivers/network/ether/vt612x/dev/mii/ |
| H A D | ciphy.c | 315 val |= CIPHY_10BTCSR_ECHO; in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 228 #define CIPHY_10BTCSR_ECHO 0x2000 /* Disable echo mode */ macro
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| /haiku/src/add-ons/kernel/drivers/network/ether/nforce/dev/mii/ |
| H A D | ciphy.c | 315 val |= CIPHY_10BTCSR_ECHO; in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 228 #define CIPHY_10BTCSR_ECHO 0x2000 /* Disable echo mode */ macro
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| /haiku/src/add-ons/kernel/drivers/network/ether/via_rhine/dev/mii/ |
| H A D | ciphy.c | 315 val |= CIPHY_10BTCSR_ECHO; in ciphy_fixup()
332 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
334 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
351 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
353 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO); in ciphy_fixup()
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| H A D | ciphyreg.h | 228 #define CIPHY_10BTCSR_ECHO 0x2000 /* Disable echo mode */ macro
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