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Searched refs:AR_TXCFG (Results 1 – 16 of 16) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_beacon.c44 OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY); in ar9300_beacon_init()
H A Dar9300_xmit.c57 txcfg = OS_REG_READ(ah, AR_TXCFG); in ar9300_update_tx_trig_level()
72 AR_TXCFG, (txcfg &~ AR_FTRIG) | SM(new_level, AR_FTRIG)); in ar9300_update_tx_trig_level()
H A Dar9300_freebsd.c969 OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY); in ar9300_beacon_set_beacon_timers()
H A Dar9300_xmit_ds.c517 OS_REG_WRITE(ah, AR_TXCFG, txcfg); in ar9300__cont_tx_mode()
H A Dar9300_reset.c4067 regval = OS_REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK; in ar9300_set_dma()
4068 OS_REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B); in ar9300_set_dma()
4083 OS_REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, 0x3f); in ar9300_set_dma()
H A Dar9300reg.h99 #define AR_TXCFG AR_MAC_DMA_OFFSET(MAC_DMA_TXCFG) macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_beacon.c103 OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ATIM_TXPOLICY); in ar5416BeaconInit()
H A Dar5416_reset.c584 OS_REG_WRITE(ah, AR_TXCFG, in ar5416InitDMA()
585 (OS_REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK) | AR_TXCFG_DMASZ_128B); in ar5416InitDMA()
598 OS_REG_WRITE(ah, AR_TXCFG, in ar5416InitDMA()
599 (OS_REG_READ(ah, AR_TXCFG) &~ AR_FTRIG) | in ar5416InitDMA()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h44 #define AR_TXCFG 0x0030 /* TX configuration register */ macro
H A Dar5210_reset.c176 OS_REG_WRITE(ah, AR_TXCFG, AR_DMASIZE_128B); in ar5210Reset()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211_xmit.c48 txcfg = OS_REG_READ(ah, AR_TXCFG); in ar5211UpdateTxTrigLevel()
67 OS_REG_WRITE(ah, AR_TXCFG, (txcfg &~ AR_TXCFG_FTRIG_M) | in ar5211UpdateTxTrigLevel()
H A Dar5211reg.h38 #define AR_TXCFG 0x0030 /* tx DMA size config register */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_xmit.c60 txcfg = OS_REG_READ(ah, AR_TXCFG); in ar5212UpdateTxTrigLevel()
70 OS_REG_WRITE(ah, AR_TXCFG, in ar5212UpdateTxTrigLevel()
H A Dar5212reg.h33 #define AR_TXCFG 0x0030 /* MAC tx DMA size config register */ macro
H A Dar5212_reset.c374 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS); in ar5212Reset()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c282 OS_REG_CLR_BIT(ah, AR_TXCFG, AR_TXCFG_DBL_BUF_DIS); in ar5312Reset()