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Searched refs:AR_PHY_TIMING_CTRL4_CHAIN (Results 1 – 6 of 6) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_cal_iq.c122 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
124 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
H A Dar5416phy.h145 #define AR_PHY_TIMING_CTRL4_CHAIN(_i) \ macro
H A Dar5416_attach.c686 tmp = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0)); in ar5416SpurMitigate()
694 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0), new); in ar5416SpurMitigate()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/
H A Dar9287_reset.c493 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0) + regChainOffset, in ar9287SetBoardValues()
494 (OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0) in ar9287SetBoardValues()
H A Dar9280_attach.c657 tmp = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0)); in ar9280SpurMitigate()
663 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0), newVal); in ar9280SpurMitigate()
H A Dar9285_reset.c195 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0), in ar9285SetBoardGain()
196 (OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0)) & in ar9285SetBoardGain()