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Searched refs:AR_PHY_TIMING_CTRL4 (Results 1 – 9 of 9) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211phy.h53 #define AR_PHY_TIMING_CTRL4 0x9920 /* PHY */ macro
H A Dar5211_reset.c478 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4, in ar5211Reset()
661 !(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_IQCAL)) { in ar5211PerCalibrationN()
699 data = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) | in ar5211PerCalibrationN()
703 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4, data); in ar5211PerCalibrationN()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_reset.c543 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212Reset()
546 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5212Reset()
1001 !(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_IQCAL)) { in ar5212PerCalibrationN()
1018 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1057 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1059 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1061 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1076 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1079 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5212PerCalibrationN()
1720 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5212SetBoardValues()
[all …]
H A Dar5212phy.h161 #define AR_PHY_TIMING_CTRL4 0x9920 /* timing control */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_cal.c100 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5416SetupMeasurement()
128 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL); in ar5416SetupMeasurement()
172 if (!ath_hal_wait(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL, 0)) {
402 if (!(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_CAL)) { in ar5416DoCalibration()
H A Dar5416_cal_iq.c130 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5416IQCalibration()
H A Dar5416phy.h146 (AR_PHY_TIMING_CTRL4 + ((_i) << 12))
H A Dar5416_reset.c1641 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4 + regChainOffset, in ar5416SetBoardValues()
1642 (OS_REG_READ(ah, AR_PHY_TIMING_CTRL4 + regChainOffset) & in ar5416SetBoardValues()
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c467 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5312Reset()
470 OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, in ar5312Reset()