Searched refs:AR_PHY_TIMING5_CYCPWR_THR1_ENABLE (Results 1 – 3 of 3) sorted by relevance
216 #define AR_PHY_TIMING5_CYCPWR_THR1_ENABLE 0x00000001 macro
1463 MS(reg, AR_PHY_TIMING5_CYCPWR_THR1_ENABLE)); in ar9300_dma_reg_dump()
3848 …REG_WRITE(ah, AR_PHY_TIMING5, OS_REG_READ(ah,AR_PHY_TIMING5) & ~AR_PHY_TIMING5_CYCPWR_THR1_ENABLE); in ar9300_init_cal_internal()